AD9857 Analog Devices, AD9857 Datasheet - Page 3

• Manufacturer Part Number: AD9857
• Description: CMOS 200 MSPS 14-Bit Quadrature Digital Upconverter
• Manufacturer: Analog Devices

Parameter
SPURIOUS POWER (Off Channel, Measured in
TIMING CHARACTERISTICS
CMOS LOGIC INPUTS
CMOS LOGIC OUTPUTS (1 mA LOAD)
POWER SUPPLY V
NOTES
1
2
3
Specifications subject to change without notice.
Wake-Up Time refers to recovery from Full Sleep Mode. The longest time required is for the Reference Clock Multiplier PLL to lock up (if it is being used). The
SYSCLK refers to the actual clock frequency used on-chip by the AD9857. If the Reference Clock Multiplier is used to multiply the external reference frequency, the
CIC = 2, INV SINC ON, FTW = 40%, PLL OFF, Auto Power-Down Between Burst On, TxENABLE Duty Cycle = 25%.
Wake-Up Time assumes that there is no capacitor on DAC_BP, and that the recommended PLL loop filter values are used. The state of the Reference Clock Multi-
plier lock can be determined by observing the signal on the PLL_LOCK pin.
SYSCLK frequency is the external frequency multiplied by the Reference Clock Multiplier multiplication factor. If the Reference Clock Multiplier is not
used, the SYSCLK frequency is the same as the external REFCLK frequency.
Equivalent Bandwidth), Output Attenuated 18 dB
Relative to Full Scale
Serial Control Bus
Logic “1” Voltage
Logic “0” Voltage
Logic “1” Current
Logic “0” Current
Input Capacitance
Logic “1” Voltage
Logic “0” Voltage
at V
6.4 MHz Bandwidth
3.2 MHz Bandwidth
1.6 MHz Bandwidth
0.8 MHz Bandwidth
0.4 MHz Bandwidth
0.2 MHz Bandwidth
Maximum Frequency
Minimum Clock Pulsewidth Low (t
Minimum Clock Pulsewidth High (t
Maximum Clock Rise/Fall Time
Minimum Data Setup Time (t
Minimum Data Hold Time (t
Maximum Data Valid Time (t
Wake-Up Time
Minimum RESET Pulsewidth High (t
Minimum CS Setup Time
Full Operating Conditions
160 MHz Clock ( 16)
120 MHz Clock ( 12)
Burst Operation (25%)
Single-Tone Mode
Power-Down Mode
Full-Sleep Mode
DD
= 3.3 V, 25 C, REFCLK = 200 MHz)
1
S
CURRENT
DH
DV
3
DS
(All Power Specs
)
)
)
PWL
PWH
RH
)
)
)
Temp
25 C
25 C
25 C
25 C
25 C
25 C
25 C
25 C
25 C
25 C
25 C
25 C
25 C
25 C
25 C
25 C
25 C
25 C
25 C
25 C
25 C
25 C
25 C
25 C
25 C
25 C
25 C
25 C
25 C
25 C
I
I
I
I
Test
Level
IV
IV
IV
IV
IV
IV
I
I
I
I
I
I
I
I
I
I
I
I
I
I
V
I
I
I
I
I
Min
30
30
30
0
35
5
40
2.0
2.7
AD9857
Typ
–51
–54
–56
–59
–62
–63
1
3
615
515
400
450
310
80
13.5
Max
10
1
0.8
5
5
0.4
Unit
dBc
dBc
dBc
dBc
dBc
dBc
MHz
ns
ns
ms
ns
ns
ns
ms
SYSCLK
ns
V
V
pF
mA
mA
mA
mA
mA
mA
mA
mA
mA
A
A
AD9857
2
Cycles