AD9854 Analog Devices, AD9854 Datasheet - Page 13

• Manufacturer Part Number: AD9854
• Description: CMOS 300 MHz Quadrature Complete-DDS
• Manufacturer: Analog Devices

REV. 0
CLOCK
REF
DDS – LO
NOTES:
FLIP DDS QUADRATURE SIGNALS TO SELECT ALTERNATE SIDE-BAND.
ADJUST DDS SINE OR COSINE SIGNAL AMPLITUDE FOR GREATEST
SIDE-BAND SUPPRESSION.
DDS DAC OUTPUTS MUST BE LOW-PASS FILTERED PRIOR TO USE
WITH THE AD8346.
CONTROLLER
REFERENCE
PROCESSOR/
Figure 28a. Agile High-Frequency Synthesizer
FPGA, ETC.
CLOCK
AD9854
TUNING
WORD
LO
DDS
REJECTION 50
TYPICAL
Figure 28b. Image Reject Mixer
36dB
+ LO
DDS
SSB
2k
FILTER
V
AD8346 QUADRATURE
OUT
8-BIT PARALLEL OR
SERIAL PROGRAMMING
DATA AND CONTROL
SIGNALS
300MHz MAX DIRECT
MODE OR 15 TO 75MHz
MAX IN THE 4 –20
CLOCK
MULTIPLIER MODE
R
SET
AD9854
REFERENCE
REFERENCE
MODULATOR
Figure 30. Frequency Agile Clock Generator Applications for the AD9854
CLOCK
CLOCK
COMPARATOR
DIVIDE-BY-N
SPLITTER
PHASE
PHASE
LO
LO
90
0
AD9854
AD9854
COSINE (DC TO 70MHz)
"Q" DAC OR
"CONTROL
SINE (DC TO 70MHz)
2.5 GHz
FILTER
0.8 TO
LOOP
"I" DAC
DAC"
Analog Frequency Double Application
A
CMOS LOGIC "CLOCK" OUT
OUT
QUADRATURE
= 100MHz
+
VCO
AD9854
Clock Frequency Doubler
DDS
FREQUENCY
LPF
LPF
LPF
LPF
OUT
RF
1
2
COS
COS
SIN
SIN
–13–
Figure 29. Differential Output Connection for Reduction of
Common-Mode Signals
LOW-PASS
LOW-PASS
COMPARATORS
ANALOG MULTIPLIER
FILTER
FILTER
REFERENCE
CLOCK
NOTES:
I
SWITCH POSTION 1 PROVIDES COMPLEMENTARY
SINUSOIDAL SIGNALS TO THE COMPARATOR
TO PRODUCE A FIXED 50% DUTY CYCLE FROM
THE COMPARATOR.
SWITCH POSTION 2 PROVIDES THE SAME DUTY CYCLE
USING QUADRATURE SINUSOIDAL SIGNALS TO THE
COMPARATOR OR A DC THRESHOLD VOLTAGE TO
ALLOW SETTING OF THE COMPARATOR
DUTY CYCLE (DEPENDS ON THE "Q" DAC's
CONFIGURATION)
OUT
AD9854
DDS
= APPROX 20mA MAX WHEN R
CLOCK OUT = 200MHz
IF
TRANSFORMER-COUPLED
I.E. MINI-CIRCUITS T1–1T
I
I
OUT
OUT
1:1 TRANSFORMER
DIFFERENTIAL
OUTPUT
50
SET
FILTER
= 2k
AD9854
50