L64777 LSI Logic Corporation, L64777 Datasheet - Page 50
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L64777
Manufacturer Part Number
L64777
Description
DVB Qam Modulator
Manufacturer
LSI Logic Corporation
Datasheet
1.L64777.pdf
(124 pages)
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2.12.2 Acquisition Phase Using the Frequency Measurement Unit
2-36
Figure 2.22 NCO Loop Diagram
During the acquisition phase, the NCO bases the measurement on the
assumption that the byte clock on the ICLK input has a duration of either
of n
bounds for the duration of the measurement. You can program the
duration in multiples of 256-byte clock cycles in the REF_DUR register
(see Section 4.2.7, “Registers 21 and 22,” page 4-14). The NCO control
register (see Section 4.2.3, “Register 14,” page 4-12) can control the start
of the measurement, and the Measurement Done bit in register 13
indicates successful completion. If bit 2 of Register 14 enables an
interrupt, the measurement generates it.
After completion of the measurement, the host reads the number of byte
clock cycles found with the appropriate length of n, n + 1 and n
NM_COUNT, N_COUNT, NP_COUNT—see Sections 4.2.10 through
4.2.12), as well as the value of n (from N_PCLK—see Section 4.2.9).
Modulator Architecture
ICLK
Byte Clock
If Serial
1, n, or n + 1 PCLK cycles and that the input stays within these
58
Phase Loop
enable_phase_loop = 1
Virtual FIFO for Automatic
CNT_I
Divider
Frequency Acquisition
Measurement Unit
phase_gain
Frequency
(for Frequency Selection)
EXOR
Step
CNT_O
Divider
NPCLK,
N_COUNT, NP_COUNT,
NM_COUNT
NCO
Step Correction
Threshold
OCLK
Interpolator
Ctrl
1 (from
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