CS2412 Amphion, CS2412 Datasheet - Page 6

• Manufacturer Part Number: CS2412
• Description: User-programmable Fft/ifft 1024-point Pipelined
• Manufacturer: Amphion

The figures in this Table are obtained from blocks of 16-bit
random number input test data vectors. The mean errors are
calculated as the difference between double precision outputs
and 16-bit integer results, while the mean square errors are the
square of this difference, averaged over the total number of
blocks.
The computation latency of CS2412 is 2040 clock cycles. This
includes all the delay for data reshuffle, computation pipeline
cuts and re-order of the transform result. The latency will be
consistent with all the operating modes, regardless of the
settings of all the control signals.
The CS2412 core achieves the following transform time when
clocked at 50 MHz, for example, with continuous input data:
6
Transform Time
CS2412
SDC
1024 point transform time = 1024 x 1/50 x 10
7
6
5
4
3
2
1
0
Number of bit
shifts
10
11
LATENCY
9
8
7
6
5
4
1024-Point Pipelined FFT/IFFT
Table 3: Output Error With Respect to SDC Signal
Maximum
28231
4809
Error
1
2
3
4
6
8
6
= 20.48µs
Overflow
Yes
Yes
Yes
No
No
No
No
No
The
EP20K300EFC672-2X device and commercial temperature
range operating conditions.
Clock frequency
Input setup time
Output delay
Characteristic
following
TIMING CHARACTERISTICS
Mean Errors
5250.0874
Table 4: Timing Characteristics
294.9297
0.18604
0.37012
0.51807
0.92969
0.92773
0.7334
timing
11.397
characteristics
Min
Mean Square Error
59558970.7437
11.397
425177.6035
Max
50
0.18604
0.37402
0.58057
1.0459
1.5928
1.6035
are
based
MHz
Units
ns
ns
on