CS6350 Amphion, CS6350 Datasheet

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CS6350

Manufacturer Part Number
CS6350
Description
Inverse DCT (Decoder)
Manufacturer
Amphion
Datasheet
At the heart of many video decompression systems is the inverse discrete cosine transform (IDCT) function. The
JPEG-compliant CS6350 IDCT provides a high-performance reconstruction of a video waveform from its
constituent frequency components. Capable of processing one symbol per cycle at sustained data rates of over
217 mega-samples/sec
heart of a high-performance video decompression solution. The CS6350 DCT is available in both ASIC and
programmable logic versions that have been handcrafted by Amphion to deliver high performance with low-
power and minimal silicon area.
Figure 1: Typical Digital Video Processing Channel Containing the CS6350
High Performance IDCT Core
ASIC/FPGA/PLD versions available
Continuous one symbol per cycle processing
capability
Other data precisions available on request
High performance (217 M samples/second)
Highly portable firm core
Ideal solution for JPEG
Fully compliant with baseline JPEG Standard
ISO/IEC 10918-1/2
1. Actual performance is dependent on the ASIC libraries used and ASIC process targeted
IDCT
FEATURES
High Performance IDCT
1
Amphion continues to expand its family of application-specific cores
in an ASIC implementation and 80 mega-samples/sec in FPGA, the CS6350 forms the
CS6350
See http://www.amphion.com for a current list of products
RASTER-BLOCK
STRIP BUFFER
CONVERTER
1
CONVERTER
COLOR
SPACE
Logic:
Memory:
Max Frequency:
JPEG systems
Scanners
Copiers
Remote digital video
KEY METRICS AND
39k gates
DECODER
PAL/NTSC
SPECIFICATIONS
1K bit RAM
APPLICATIONS
Virtual Components for the Converging World
217 MHz
DISPLAY
DEVICE
TM
1

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CS6350 Summary of contents

Page 1

... ASIC implementation and 80 mega-samples/sec in FPGA, the CS6350 forms the heart of a high-performance video decompression solution. The CS6350 DCT is available in both ASIC and programmable logic versions that have been handcrafted by Amphion to deliver high performance with low- power and minimal silicon area. ...

Page 2

... CS6350 High Performance IDCT PIN/PORT DESCRIPTION Table 1 describes the input and output ports (shown graphically in Figure 2) for the CS6350 High Performance IDCT core. Unless otherwise stated, all signals are active high and bit (0) is the least significant bit. Signal I/O CLK Input ...

Page 3

... This results in a set of intermediate results being produced which require storage and further processing. The CS6350 performs its function as two 1-dimensional transforms, using row-column decomposition, with the intermediate results being stored in the transpose memory. A block diagram of the core, showing the main interfaces and functional blocks is shown in Figure 3 with the blocks described in the following sections ...

Page 4

... CS6350 High Performance IDCT DCT OPERATION The processing may begin by supplying 8x8 blocks of 11-bit DCT coefficients to the DctCoef port, with the first sample of the block being coincident with the DctStrb. The IDCT is performed as two one dimensional IDCTs, with the intermediate results being stored in the Transpose memory ...

Page 5

... Xilinx Virtex-E *Performance represents core only under worst case commercial condition. Does not include timing effect of external logic and I/O circuitry. ASIC CORES Table 2: CS6350 ASIC Cores PERFORMANCE* 217 Table 3: CS6350 Programmable Logic Cores PERFORMANCE* DEVICE RESOURCES (MSAMPLES/ USED (LOGIC) SEC) 83 3434 LEs ...

Page 6

... CS6350 High Performance IDCT ABOUT AMPHION Amphion (formerly Integrated Silicon Systems) is the leading supplier of speech coding, video/ image processing and channel coding application specific silicon cores for system-on-a-chip (SoC) solutions in the broadband, wireless, and mulitmedia markets Web: www.amphion.com Email: info@amphion.com ...

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