MX26L12811MC ETC-unknow, MX26L12811MC Datasheet - Page 27

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MX26L12811MC

Manufacturer Part Number
MX26L12811MC
Description
128m [x8/x16] Single 3v Page Mode Mtp Memory
Manufacturer
ETC-unknow
Datasheet

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NOTES:
1. CEX low is defined as the first edge of CE that enables the device. CEX high is defined at the first edge of CE that
P/N:PM0990
Figure 12. AC Waveform for Write Operations
CEx,(WE)[E(W)]
WE,(CEx)[W(E)]
disables the device (see Table 1).
a. VCC power-up and standby.
b. Write block erase, write buffer, or program setup.
c. Write block erase or write buffer confirm, or valid address and data.
d. Automated erase delay.
e. Read status register or query data.
f. Write Read Array command.
DATA[D/Q]
Address
Disable
Disable
Enable VIL
Enable VIL
OE
(A)
VIH
VIH
VIH
VIH
VIH
VIL
VIL
VIL
A
tELWL
(tWLEL)
tDVWH
(tDVEH)
tWP
tAVWH
(tAVEH)
AIN
B
DIN
tWHEH
(tEHWH)
tWPH
tWHDX
(tEHDX)
AIN
C
DIN
27
tWHAX
(tEHAX)
D
tWHGL
(tEHGL)
MX26L12811MC
E
Valid
SRD
F
REV. 1.0, OCT. 29, 2003
DIN

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