MX26L12811MC ETC-unknow, MX26L12811MC Datasheet - Page 26

• Manufacturer Part Number: MX26L12811MC
• Description: 128m [x8/x16] Single 3v Page Mode Mtp Memory
• Manufacturer: ETC-unknow

NOTES:
CEX low is defined as the first edge of CE that enables the device. CEX high is defined at the first edge of CE that
disables the device (see Table 2).
1. Read timing characteristics during block erase, program, and lock-bit configuration operations are the same as
2. A write operation can be initiated and terminated with either CE X or WE.
3. Sampled, not 100% tested.
4. Write pulse width (tWP) is defined from CEX or WE going low (whichever goes low last) to CEX or WE going high
5. Refer to Table 4 for valid A IN and D IN for block erase, program, or lock-bit configuration.
6. Write pulse width high (t WPH) is defined from CEX or WE going high (whichever goes high first) to CEX or WE
7. For array access, tAVQV is required in addition to tWHGL for any accesses after a write.
P/N:PM0990
AC Characteristics--Write Operations (1,2)
Symbol
tELWL (tWLEL )
tWP
tDVWH (tDVEH )
tAVWH (tAVEH )
tWHEH (tEHWH)
tWHDX (tEHDX)
tWHAX (tEHAX)
tWPH
tWHGL (tEHGL)
tWHQV5 (tEHQV5) Set Lock-Bit Time
tWHQV6 (tEHQV6) Clear Block Lock-Bits Time
during read-only operations. Refer to AC Characteristics-Read-Only Operations.
(whichever goes high first). Hence, tWP = tWLWH = tELEH = tWLEH = tELWH.
going low (whichever goes low first). Hence, tWPH = tWHWL = tEHEL = tWHEL = tEHWL .
Parameter
CEX (WE) Low to WE(CEX) Going Low
Write Pulse Width
Data Setup to WE(CEX) Going High
Address Setup to WE(CEX) Going High
CEX (WE) Hold from WE(CEX) High
Address Hold from WE(CEX) High
Write Pulse Width High
Write Recovery before Read
Data Hold from WE(CEX) High
Versions
26
MX26L12811MC
Notes
4
4
5
5
6
7
4
4
Valid for All
Min
0.5
70
50
55
30
35
64
0
0
0
0
Speeds
75/85
Max
REV. 1.0, OCT. 29, 2003
2
Unit
sec
ns
ns
ns
ns
ns
ns
ns
ns
ns
us