MBM30LV0128 Fujitsu Microelectronics, Inc., MBM30LV0128 Datasheet - Page 7

• Manufacturer Part Number: MBM30LV0128
• Description: Flash Memory 128 M 16 M X 8 Bit Nand-type
• Manufacturer: Fujitsu Microelectronics, Inc.

* : X
First Cycle
Second Cycle
Third Cycle
SCHEMATIC CELL LAYOUT AND ADDRESS ASSIGNMENT
The Program operation is implemented in page units while the Erase operation is carried out in block units.
Memory Cell
Array
A
A
(A
0
9
to A
to A
8
Register
V
is automatically set to “Low” or “High” by the “00h” command or the “01h” command inside the device.)
IH
7
23
or V
: column address
: page address
IL
I/O0
A
A
A
17
0
9
A
A
14
9
to A
512
to A
528
I/O1
A
A
A
13
23
10
18
1
Figure 1 Schematic Cell Layout
: block address
: Page address in block
16
Table 1 Addressing
I/O2
A
A
A
11
19
2
8 I/O
32 pages
1 block
I/O7
I/O3
A
A
1) A page consists of (512
2) A block consists of 16 pages; (16 K 512) bytes.
3) Total device density
A
I/O0
12
20
3
528 bytes
- 512 bytes for main memory
- 16 bytes for redundancy or other use
I/O4
A
A
A
13
21
4
Read and Program operations
are executed through Register
Register = 1 page size
32 pages
MBM30LV0128
I/O5
A
A
A
14
22
5
16) bytes;
1024 blocks.
I/O6
A
A
A
15
23
6
I/O7
A
X*
A
16
7
7