MBM30LV0128 Fujitsu Microelectronics, Inc., MBM30LV0128 Datasheet - Page 18

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MBM30LV0128

Manufacturer Part Number
MBM30LV0128
Description
Flash Memory 128 M 16 M X 8 Bit Nand-type
Manufacturer
Fujitsu Microelectronics, Inc.
Datasheet
18
MBM30LV0128
(Continued)
Notes : 1. AC Test Conditions :
RE Last Clock Rising Edge to Busy (in Sequential Read)
CE High to Ready (in Case of Interception by CE in Read Mode)
(Note 2)
Device Resetting Time (Read/Program/Erase)
R/B
CE
RE
2. The time to go from CE high to Ready depends on the pull-up resister of the R/B pin (see Application
3. If you toggle CE to high after access to the last address (address 527) in the resister in the read
mode (1) , (2) , and (3) , the CE high time must be held for 100 ns or more when the delay time of CE with
Notes (6) ) toward the end of this document.
respect to RE is 0 to 200 ns (see the figure below) . When the CE delay time is within 30 ns, the device
is kept in the Ready state and will output no Busy signal.
Input level
Input comparison level
Output data comparison level
Output load
Load capacitance (C
Transition time (t
Operating range
525
509
Parameter
T
)
L
)
526
510
V
CC
2.7 to 3.6 V
50 pF
527
511
2.4 V/0.4 V
1.5 V/1.5 V
1.5 V/1.5 V
1TTL
A
5 ns
V
t
CEH
Busy
CC
A
Symbol
t
t
100 pF
t
CRY
100 ns
RST
3.0 to 3.6 V
0 to 30 ns
RB
Busy signal is not output.
Min.
*
Value
5/10/500
50
Max.
*: VIH or VIL
(R/B)
100
tr
Unit
ns
ns
s

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