MBM30LV0128 Fujitsu Microelectronics, Inc., MBM30LV0128 Datasheet - Page 10

• Manufacturer Part Number: MBM30LV0128
• Description: Flash Memory 128 M 16 M X 8 Bit Nand-type
• Manufacturer: Fujitsu Microelectronics, Inc.

10
MBM30LV0128
READ MODE
Read (1) , (2) : 00h/01h
FUNCTIONAL DESCRIPTION
There are three distinct commands used for the read operation : 00h, 01h, and 50h. After the command cycle,
three address cycles are used to input the starting address. Upon the rising edge of the final WE pulse, there
is a 10 s latency in which the 528 byte page is transferred to the data register. The R/B signal may be used to
monitor the completion of the data transfer. Once the data page has been loaded into the data register, it may
be clocked out with consecutive 50 ns RE pulses. Each RE pulse will automatically advance the column address
by one. Once the last column has been read, the page address will automatically increment by one and the data
register will be updated with the new page after 10 s. In this sequential read operation, the CE signal must stay
“Low” after the third address input and during Busy state. If the CE signal goes High during this period, the read
operation will be terminated and then the standby mode will be entered. (In the read operation, after read
command and address input, the CE signal can be “Don’t care” after the third address input and during Busy
state.)
The 00h Read command will set the pointer to the first half of the page of the array while the 01h Read command
sets it in the second half. It may be logical to think of 00h as a command which sets A
1. The 50h command sets the pointer to the spare area, consisting of columns 512 to 527. During this read
mode, A
the spare area page is loaded into the data register, it may be read out by RE pulses. Each RE pulse will increment
the column address until the final column (527) is reached. At this time, the pointer will be reset to column 512
while the page address is incriminated and the data register is updated. (In this sequential read operation also,
CE signal must stay “Low” after the third address input and during Busy state.) The 00h or 01h command is
required to move the pointer back into the main array area.
The Read (1) , (2) mode is invoked by latching the 00h or 01h command into the command register. This mode
(00h) will automatically be selected when the device powers up.
3
I/O0
CLE
ALE
to I/O7
WE
CE
RE
R/B
to A
0
is used to set the starting address of the spare area. As with the 00h and 01h operations, once
Command 01h
Page (Row)
Address
00h
Figure 2 Read Mode (1) , (2) Operation
X
0
Y
Starting Address
Y
(Column Address)
X
255
X
Y
511 527
Data Output
8
0 while 01h sets A
8