MBM29DL16XTE70PFTN Meet Spansion Inc., MBM29DL16XTE70PFTN Datasheet - Page 43

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MBM29DL16XTE70PFTN

Manufacturer Part Number
MBM29DL16XTE70PFTN
Description
Flash Memory Cmos 16m 2m ? 8/1m ? 16 Bit Dual Operation
Manufacturer
Meet Spansion Inc.
Datasheet
• Low V
• Write Pulse “Glitch” Protection
• Logical Inhibit
• Power-Up Write Inhibit
• Sector Group Protection
To avoid initiation of a write cycle during V
than V
Under this condition the device will reset to the read mode. Subsequent writes will be ignored until the V
is greater than V
unintentional writes when V
If Embedded Erase Algorithm is interrupted, there is possibility that the erasing sector(s) cannot be used.
Noise pulses of less than 3 ns (typical) on OE, CE, or WE will not initiate a write cycle.
Writing is inhibited by holding any one of OE = V
must be a logical zero while OE is a logical one.
Power-up of the devices with WE = CE = V
The internal state machine is automatically reset to the read mode on power-up.
Device user is able to protect each sector group individually to store and protect data. Protection circuit voids
both program and erase commands that are addressed to protected sectors.
Any commands to program or erase addressed to protected sector are ignored (see “■ FUNCTIONAL
DESCRIPTION Sector Group Protection”)
CC
LKO
Write Inhibit
. If V
CC
< V
LKO
. It is the users responsibility to ensure that the control pins are logically correct to prevent
LKO
, the command register is disabled and all internal program/erase circuits are disabled.
CC
is above V
Retired Product DS05-20874-8E_July 12, 2007
LKO
CC
IL
.
and OE = V
power-up and power-down, a write cycle is locked out for V
IL
, CE = V
IH
MBM29DL16XTD/BD
will not accept commands on the rising edge of WE.
IH
, or WE = V
IH
. To initiate a write cycle CE and WE
CC
-70/90
CC
level
less
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