CY24271 Cypress Semiconductor Corporation., CY24271 Datasheet - Page 9

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CY24271

Manufacturer Part Number
CY24271
Description
Rambus Xdr Clock Generator
Manufacturer
Cypress Semiconductor Corporation.
Datasheet

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY24271ZXC
Manufacturer:
Maxim
Quantity:
12
AC Electrical Specification
The AC Electrical specifications follow.
Test and Measurement Setup
Document Number: 001-00411 Rev. *B
t
t
L
t
Δt
DC
t
t
t
Notes
CYCLE
JIT(cc)
JIT(hper,cc)
EER,SCC
CR
CR,CF
Parameter
20. Max and min output clock cycle times are based on nominal outputs frequency of 300 and 800 MHz, respectively. For spread spectrum modulated differential or
21. Output short term jitter spec is the absolute value of the worst case deviation.
22. t
23. t
20
SKEW
,t
single-ended REFCLK, the output clock tracks the modulation of the input.
operating temperature and supply voltage change.
SKEW
CR,CF
CF
is the timing difference between any two of the four differential clocks and is measured at common mode voltage. Δt
applies only when appropriate R
Clock Cycle time
Jitter over 1-6 clock cycles at 400–635 MHz
Jitter over 1-6 clock cycles at 638–800 MHz
Phase noise SSB spectral purity L(f) at 20 MHz offset: 400–500 MHz
(In addition, device must not exceed L(f) = 10log[1+(50x10
f = 1 MHz to 100 MHz except for the region near f = REFCLK/Q where Q is
the value of the internal reference divider.)
533 MHz and faster output
Cycle-to-cycle duty cycle error at 400–635 MHz
Cycle-to-cycle duty cycle error at 636–800 MHz
Drift in t
supply voltage varies between 2.375V and 2.625V.
Long term average output duty cycle
PLL output phase error when tracking SSC
Output rise and fall times at 400–800 MHz (measured at 20%–80% of output
voltage)
Difference between output rise and fall times on the same pin of the single
device (20%–80%) of 400–800 MHz
SKEW
Swing Current
Control
when ambient temperature varies between 0°C and 70°C and
ISET
[20]
RC
and output resistor network resistor values are selected to match pull up and pull down currents.
[7]
Differential Driver
Description
[23]
Figure 3. Clock Outputs
CLKB
CLK
[21]
[22]
V
V
TS
TS
R
R
R
R
R
R
2
2
1
3
1
3
6
Measurement
Point
Measurement
Point
/f)
2.4
] –138 for
Z
Z
CH
CH
–100
1.25
45%
Min
120
V
V
T
T
SKEW
R
R
–135
T
T
Typ
25
25
25
25
50
is the change in t
–128
Max
3.34
TBD
55%
100
300
100
40
30
40
30
15
CY24271
SKEW
dBC/Hz
Page 9 of 13
t
CYCLE
Unit
ns
ps
ps
ps
ps
ps
ps
ps
ps
when the
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