MC56F8366 Freescale Semiconductor, Inc, MC56F8366 Datasheet - Page 25

• Manufacturer Part Number: MC56F8366
• Description: 56f8300 16-bit Digital Signal Controllers
• Manufacturer: Freescale Semiconductor, Inc

Freescale Semiconductor
Preliminary
Signal Name
(CAN2_TX)
(GPIOD9)
GPIOD0
(CS1)
(CS2)
DS
Table 2-2 Signal and Package Information for the 144-Pin LQFP
Pin No.
47
48
Output
Output
Output
Output
Output
Input/
Input/
Open
Type
Drain
disabled,
pull-up is
output is
In reset,
enabled
enabled
During
pull-up
Reset
Input,
State
56F8366 Technical Data, Rev. 6
Data Memory Select — This signal is actually CS1 in the EMI,
which is programmed at reset for compatibility with the 56F80x DS
signal. DS is asserted low for external data memory access.
Depending upon the state of the DRV bit in the EMI bus control
register (BCR), DS is tri-stated when the external bus is inactive.
CS1 resets to provide the DS function as defined on the 56F80x
devices.
Port D GPIO — This GPIO pin can be individually programmed as
an input or output pin.
To deactivate the Internal pull-up resistor, clear bit 9 in the
GPIOD_PUR register.
Port D GPIO — This GPIO pin can be individually programmed as
an input or output pin.
Chip Select — CS2 may be programmed within the EMI module to
act as a chip select for specific areas of the external memory map.
Depending upon the state of the DRV bit in the EMI Bus Control
Register (BCR), CS2 is tri-stated when the external bus is inactive.
Most designs will want to change the DRV state to DRV = 1 instead of
using the default setting.
FlexCAN2 Transmit Data — CAN output.
At reset, this pin is configured as GPIO. This configuration can be
changed by setting bit 0 in the GPIO_D_PER register. Then
change bit 4 in the SIM_GPS register to select the desired
peripheral function.
To deactivate the internal pull-up resistor, clear bit 0 in the
GPIOD_PUR register.
Signal Description
Signal Pins
25