HY27LF081G2M Hynix Semiconductor, HY27LF081G2M Datasheet - Page 21

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HY27LF081G2M

Manufacturer Part Number
HY27LF081G2M
Description
1gbit 128mx8bit / 64mx16bit Nand Flash Memory
Manufacturer
Hynix Semiconductor
Datasheet
Rev 0.7 / Apr. 2005
CLE Setup time
CLE Hold time
CE# setup time
CE# hold time
WE# pulse width
ALE setup time
ALE hold time
Data setup time
Data hold time
Write Cycle time
WE# High hold time
ALE to Data Loading time
Data Transfer from Cell to register
ALE to RE# Delay (ID Read)
CLE to RE# Delay
Ready to RE# Low
RE# Pulse Width
WE# High to Busy
Read Cycle Time
RE# Access Time
RE# High to Output High Z
CE# High to Output High Z
RE or CE High to Output hold
RE# High Hold Time
Output High Z to RE# low
CE# Access Time
WE# High to RE# low
Device Resetting Time
(Read / Program / Erase)
NOTE:
1. If Reset Command (FFh) is written at Ready state, the device goes into Busy for maximum 5us
2. These parameters are applied to the errata.
3. tADL is the time from the WE# rising edge of final address cycle to the WE# rising edge of first data cycle.
Parameter
Table 13: AC Timing Characteristics
1Gbit (128Mx8bit / 64Mx16bit) NAND Flash
Symbol
t
tADL
tCLR
t
t
t
t
t
tOH
t
t
t
t
t
t
t
t
t
tAR
t
t
t
t
t
t
WHR
t
REH
CLH
ALH
REA
RHZ
CHZ
t
CEA
RST
CLS
ALS
WH
WP
WC
t
WB
CH
DS
DH
RR
RC
CS
RP
IR
R
Min
15
40
15
25
60
25
60
30
100
5
5
10
15
20
10
10
20
15
60
(2)
0
(2)
0
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
1.8Volt
HY27UF(08/16)1G2M Series
HY27SF(08/16)1G2M Series
5/10/ 500
Max
27
100
30
30
20
45
(2)
(1)
Min
15
40
15
25
60
25
60
30
5
5
100
10
15
20
10
10
20
15
60
(2)
0
(2)
0
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
3.3Volt
5/10/500
Preliminary
Max
27
100
30
30
20
45
(2)
(1)
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
us
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
us
21

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