STPCC03 STMicroelectronics, STPCC03 Datasheet - Page 50

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STPCC03

Manufacturer Part Number
STPCC03
Description
STPC CONSUMER-S DATASHEET- PC COMPATIBLE EMBEDDED MICROPROCESSOR
Manufacturer
STMicroelectronics
Datasheet

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BOARD LAYOUT
6.3.4 Address & Control Signals
This group encompasses the memory address
MA[10:0], bank address BA[0], RAS, CAS and
write enable WE signals. The load of the DIMM
module on these signals is the most important one
and depends upon the type of SDRAM compo-
50/59
Figure 6-14. Address/control equivalent circuit
Rterm
Issue 1.1 - October 16, 2000
100mm
(0.7ns)
Z
Ø
pcb
nents used (x4, x8 or x16) and whether the DIMM
module is single or dual row. The capacitive load-
ing of the SDRAM inputs alone for an x8 single
row DIMM will be about 30-40pF. An equivalent
circuit for the timing simulation is shown inFigure
6-14 Most of the delays are due to the PCB traces
and loading rather than the pad itself.
10mm

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