74LVC2G126DC,125 NXP Semiconductors, 74LVC2G126DC,125 Datasheet - Page 12
![IC BUS BUFF DVR TRI-ST DL 8VSSOP](/photos/6/94/69485/8-vssop_sot765-1_sml.jpg)
74LVC2G126DC,125
Manufacturer Part Number
74LVC2G126DC,125
Description
IC BUS BUFF DVR TRI-ST DL 8VSSOP
Manufacturer
NXP Semiconductors
Series
74LVCr
Datasheet
1.74LVC2G126DC125.pdf
(22 pages)
Specifications of 74LVC2G126DC,125
Package / Case
US8, 8-VSSOP
Logic Type
Buffer/Line Driver, Non-Inverting
Number Of Elements
2
Number Of Bits Per Element
1
Current - Output High, Low
32mA, 32mA
Voltage - Supply
2 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Logic Family
LVC
Number Of Channels Per Chip
2
Polarity
Non-Inverting
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1.65 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
High Level Output Current
- 32 mA
Input Bias Current (max)
40 uA
Low Level Output Current
32 mA
Maximum Power Dissipation
300 mW
Minimum Operating Temperature
- 40 C
Output Current
50 mA
Output Type
3-State
Output Voltage
6.5 V
Propagation Delay Time
2.8 ns (Typ) @ 2.7 V or 2.4 ns (Typ) @ 3.3 V or 1.9 ns (Typ) @ 5 V
Number Of Lines (input / Output)
2 / 2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
74LVC2G126DC-G
74LVC2G126DC-G
935274583125
74LVC2G126DC-G
935274583125
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
74LVC2G126DC,125
Manufacturer:
NXP Semiconductors
Quantity:
2 900
NXP Semiconductors
Fig 11. Package outline SOT765-1 (VSSOP8)
74LVC2G126
Product data sheet
VSSOP8: plastic very thin shrink small outline package; 8 leads; body width 2.3 mm
DIMENSIONS (mm are the original dimensions)
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
UNIT
mm
VERSION
OUTLINE
SOT765-1
max.
A
1
0.15
0.00
A 1
8
1
Z
0.85
0.60
A 2
y
IEC
e
0.12
A 3
pin 1 index
D
0
0.27
0.17
b p
b p
All information provided in this document is subject to legal disclaimers.
MO-187
0.23
0.08
5
JEDEC
4
c
w
REFERENCES
Rev. 9 — 13 September 2010
D
2.1
1.9
M
(1)
E
2.4
2.2
(2)
c
JEITA
scale
2.5
0.5
e
A
H E
3.2
3.0
A 2
detail X
A 1
0.4
L
H E
E
0.40
0.15
L p
Dual bus buffer/line driver; 3-state
0.21
0.19
Q
5 mm
L
L p
PROJECTION
EUROPEAN
Q
0.2
v
A
74LVC2G126
(A 3 )
0.13
w
X
θ
v
M
0.1
y
© NXP B.V. 2010. All rights reserved.
A
ISSUE DATE
02-06-07
Z
0.4
0.1
(1)
SOT765-1
8°
0°
θ
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