NC7SZ126M5 Fairchild Semiconductor, NC7SZ126M5 Datasheet - Page 5

IC BUFF TRI-ST UHS N-INV SOT235

NC7SZ126M5

Manufacturer Part Number
NC7SZ126M5
Description
IC BUFF TRI-ST UHS N-INV SOT235
Manufacturer
Fairchild Semiconductor
Series
7SZr
Datasheets

Specifications of NC7SZ126M5

Logic Type
Buffer/Line Driver, Non-Inverting
Number Of Elements
1
Number Of Bits Per Element
1
Current - Output High, Low
32mA, 32mA
Voltage - Supply
1.65 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
SOT-23-5, SC-74A, SOT-25
Logic Family
NC7SZ
Number Of Channels Per Chip
Single
Polarity
Non-Inverting
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1.65 V
Maximum Operating Temperature
85 C
Mounting Style
SMD/SMT
High Level Output Current
- 32 mA
Input Bias Current (max)
2 uA
Low Level Output Current
32 mA
Maximum Power Dissipation
200 mW
Minimum Operating Temperature
- 40 C
Number Of Lines (input / Output)
1
Output Type
3-State
Propagation Delay Time
5.7 ns @ 3.3 V or 5 ns @ 5 V
Logical Function
Buffer/Line Driver
Number Of Elements
1
Number Of Channels
1
Number Of Inputs
1
Number Of Outputs
1
Operating Supply Voltage (typ)
1.8/2.5/3.3/5V
Package Type
SOT-23
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
1.65V
Quiescent Current
2uA
Technology
CMOS
Pin Count
5
Mounting
Surface Mount
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Logic Device Type
Buffer, Non Inverting
Supply Voltage Range
1.65V To 5.5V
Logic Case Style
SOT-23
No. Of Pins
5
Operating Temperature Range
-40°C To +85°C
Filter Terminals
SMD
Rohs Compliant
Yes
Family Type
7SZ
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
NC7SZ126M5TR

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© 1996 Fairchild Semiconductor Corporation
NC7SZ126 • Rev. 1.0.3
AC Electrical Characteristics
Note:
2.
Note:
3.
Note:
4.
Symbol
t
t
t
PLH,
PZL,
PLZ,
C
C
C
OUT
PD
t
t
IN
C
current consumption (I
operating current by the expression: I
C
Input PRR=1.0MHz, t
Input=AC Waveform; t
PRR=10MHz; Duty Cycle=50%.
t
PZH
PHZ
PHL
PD
L
includes load and stray capacitance.
is defined as the value of the internal equivalent capacitance which is derived from dynamic operating
Propagation Delay
Output Enable Time
Output Disable Time
Input Capacitance
Output Capacitance
Power Dissipation
Capacitance
Parameter
Figure 5. I
Figure 4. AC Test Circuit
(2)
W
CCD
r
CCD
=500ns
=t
f
=1.8ns;
Test Circuit
) at no output lading and operating at 50% duty cycle. C
2.50 ± 0.20
3.30 ± 0.30
5.00 ± 0.50
3.30 ± 0.30
5.00 ± 0.50
2.50 ± 0.20
3.30 ± 0.30
5.00 ± 0.50
2.50 ± 0.20
3.30 ± 0.30
5.00 ± 0.50
1.65
1.80
1.65
1.80
1.65
1.80
0.00
0.00
3.30
5.00
V
CC
CCD
C
R
S
C
R
S
C
R
RU=500Ω
S
S
V
C
R
RU=500Ω
S
S
V
L
D
1
L
D
1
L
D
1
1
IN
L
D
1
1
IN
=(C
Conditions
=OPEN
=OPEN
=GND for t
=V
=GND for t
=V
=15pF,
=50pF,
=50pF,
=50pF,
=1MΩ
=500Ω
=500Ω
=500Ω
=2•V
=2•V
IN
IN
PD
for t
for t
CC
CC
)(V
PZL
PLZ
CC
PZH
PHZ
)(f
5
IN
)+(I
Min. Typ. Max.
2.0
2.0
0.8
0.5
0.5
1.5
0.8
2.0
2.0
1.5
1.5
0.8
2.0
2.0
1.0
1.0
0.5
CC
static).
T
A
=25°C
6.4
5.3
3.4
2.5
2.1
3.2
2.6
8.4
6.1
3.8
3.2
2.3
6.5
5.6
4.0
3.5
2.5
17
24
4
8
Figure 6. AC Waveforms
13.2
11.0
15.0
11.5
13.2
11.0
7.5
5.2
4.5
5.7
5.0
8.0
5.7
5.0
8.0
5.7
4.7
T
Min.
A
2.0
2.0
0.8
0.5
0.5
1.5
0.8
2.0
2.0
1.5
1.5
0.8
2.0
2.0
1.0
1.0
0.5
=-40 to +85°C
PD
is related to I
Max.
13.8
11.5
15.6
12.0
14.5
8.0
5.5
4.8
6.0
5.3
8.5
6.0
5.3
8.5
6.0
5.0
12
Units Figure
CCD
pF
ns
ns
pF
pF
www.fairchildsemi.com
dynamic
I
Figure 4
Figure 6
Figure 4
Figure 6
Figure 5

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