IR3897MTRPBF International Rectifier, IR3897MTRPBF Datasheet - Page 26

• Manufacturer Part Number: IR3897MTRPBF
• Description: 4A Highly Integrated Single-Input Voltage, Synchronous Buck Regulator in a PQFN package.
• Manufacturer: International Rectifier

Specifications of IR3897MTRPBF

• Part Status: Active and Preferred
• Package: PQFN / 4 x 5
• Circuit: Single Output
• Iout (a): 4
• Switch Freq (khz): 0 - 1500
• Input Range (v): 1.0 - 16
• Output Range (v): 0.5 - 12
• Pbf: PbF Option Available

DESIGN EXAMPLE
The following example is a typical application for
IR3897. The application circuit is shown in Fig.28.
Enabling the IR3897
As explained earlier, the precise threshold of the Enable
lends itself well to implementation of a UVLO for the
Bus Voltage as shown in Fig. 22.
For a typical Enable threshold of V
For V
choice.
Programming the frequency
For F
Figure 22: Using Enable pin for UVLO implementation
V
R
s
in
in
= 600 kHz, select R
2
V
V
Ripple Voltage= 1% *
I
ΔV
F
(min)
(min)
o

in
o
s
= 4 A
=1 2 V
=600 kHz
=12 V ( 10% )
o
R
=9.2V, R
.
*
1
=
V
26
R

in(
1
5% *
R

min

2
V
R
1
FEBRUARY 02, 2012 |DATA SHEET | Rev 3.2
=49.9K and R
EN
)
2
V

o


V
V
for
EN
t
= 39.2 KΩ, using Table 1.
EN

50%
V

o
1.2
2
=7.5K ohm is a good
EN
load transient

= 1.2 V
Single‐Input Voltage, Synchronous Buck Regulator
(7)
(8)
)
- 26 -
4A Highly Integrated SupIRBuck
Output Voltage Programming
Output voltage is programmed by reference voltage and
external voltage divider. The Fb pin is the inverting input of
the error amplifier, which is internally referenced to 0.5V.
The divider ratio is set to provide 0.5V at the Fb pin when the
output is at its desired value. The output voltage is defined by
using the following equation:
When an external resistor divider is connected to the output
as shown in Fig. 23.
For the calculated values of R5 and R6, see feedback
compensation section.
Bootstrap Capacitor Selection
To drive the Control FET, it is necessary to supply a gate
voltage at least 4V greater than the voltage at the SW pin,
which is connected to the source of the Control FET.
This is achieved by using a bootstrap configuration, which
comprises the internal bootstrap diode and an external
bootstrap capacitor (C1). The operation of the circuit is as
follows: When the sync FET is turned on, the capacitor node
connected to SW is pulled down to ground. The capacitor
charges towards V
(Fig.24), which has a forward voltage drop V
across the bootstrap capacitor C1 is approximately given as:
Figure 23: Typical application of the IR3897
R
V
for programming the output voltage
o
6
V


c
cc
V
R
through the internal bootstrap diode

ref
5
V

cc








V

1
V
o
V

D

ref

V
R
R
ref
5
6
TM









(11)
(10)
(9)
IR3897
D
. The voltage V
PD‐97663
c