TMP89xy60UG/FG Toshiba, TMP89xy60UG/FG Datasheet - Page 291

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TMP89xy60UG/FG

Manufacturer Part Number
TMP89xy60UG/FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP89xy60UG/FG

Package
LQFP64/QFP64
Rom Types (m=mask,p=otp,f=flash)
M/F
Rom Size
32/60
Ram Size
3K
Driver Led
8
Driver Lcd
-
Spi/sio Channels
-
Uart/sio Channels
2
I2c/sio Channels
1
High-speed Serial Output
-
Adc 8-bit Channels
-
Adc 10-bit Channels
16
Da Converter Channels
-
Timer Counter 18-bit Channel
-
Timer Counter 16-bit Channel
2
Timer Counter 8-bit Channel
4
Motor Channels
-
Watchdog Timer
Y
Dual Clock
Y
Clock Gear
Y
Number Of I/o Ports
58
Power Supply (v)
4.3 to 5.5
RA002
18.3
Low power consumption register 1
POFFCR1
(0x0F75)
is not being used.
Note 1: When SBI0EN is cleared to "0", the clock supply to the serial bus interface is stopped. At this time, the data written
The following registers are used to control the serial bus interface and monitor the operation status.
In addition, the serial bus interface has low power consumption registers that save power when the serial bus interface
Control
・ Serial bus interface control register 1 (SBI0CR1)
・ Serial bus interface control register 2 (SBI0CR2)
・ Serial bus interface status register 2 (SBI0SR2)
・ Serial bus interface data buffer register (SBI0DBR)
・ I
UART2EN
UART1EN
UART0EN
2
to the serial bus interface control registers is invalid. When the serial bus interface is used, set SBI0EN to "1" and
then write the data to the serial bus interface control registers.
SBI0EN
Read/Write
C bus address register (I2C0AR)
Bit Symbol
After reset
I2C0 control
UART2 control
UART1 control
UART0 control
R/W
7
0
-
R/W
6
0
-
R/W
5
0
Page 275
-
0
1
0
1
0
1
0
1
Disable
Enable
Disable
Enable
Disable
Enable
Disable
Enable
SBI0EN
R/W
4
0
R/W
3
0
-
UART2EN
R/W
2
0
UART1EN
R/W
1
0
TMP89FS60
UART0EN
R/W
0
0

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