TMP89xy60UG/FG Toshiba, TMP89xy60UG/FG Datasheet - Page 273

• Manufacturer Part Number: TMP89xy60UG/FG
• Manufacturer: Toshiba

Specifications of TMP89xy60UG/FG

• Package: LQFP64/QFP64
• Rom Types (m=mask,p=otp,f=flash): M/F
• Rom Size: 32/60
• Ram Size: 3K
• Driver Led: 8
• Driver Lcd: -
• Spi/sio Channels: -
• Uart/sio Channels: 2
• I2c/sio Channels: 1
• High-speed Serial Output: -
• Adc 8-bit Channels: -
• Adc 10-bit Channels: 16
• Da Converter Channels: -
• Timer Counter 18-bit Channel: -
• Timer Counter 16-bit Channel: 2
• Timer Counter 8-bit Channel: 4
• Motor Channels: -
• Watchdog Timer: Y
• Dual Clock: Y
• Clock Gear: Y
• Number Of I/o Ports: 58
• Power Supply (v): 4.3 to 5.5

RA001
SIO0CR<SIOS>
SIO0CR<SIOM>
SIO0SR<SIOF>
SIO0SR<SEF>
SIO0SR<TBFL>
Internal clock
SO0 pin (output)
SCLK0 pin (output)
INTSIO0 interrupt request
SIO0BUF
Write to SIO0BUF
SIO0CR<SIOS>
SIO0CR<SIOM>
SIO0SR<SIOF>
SIO0SR<SEF>
SIO0SR<TBFL>
Internal clock
SO0 pin (output)
SCLK0 pin (output)
INTSIO0 interrupt request
SIO0BUF
Write to SIO0BUF
Figure 17-4 8-bit Transmit Mode (Internal Clock and Reserved Stop)
Figure 17-5 8-bit Transmit Mode (Internal Clock and Forced Stop)
Writing data A
Writing data A
Start operation
Start operation
A
A
Bit0 Bit1 Bit2 Bit3 Bit4 Bit5 Bit6 Bit7 Bit0 Bit1 Bit2
Bit0 Bit1 Bit2 Bit3 Bit4 Bit5 Bit6 Bit7 Bit0 Bit1 Bit2 Bit3 Bit4 Bit5 Bit6 Bit7
Writing data B
Writing data B
Data A
Data A
B
B
01
Writing data C
Page 257
Data B
C
The level is held for the period
Forced stop
of the internal clock×(1/2)
Data B
01
Data is not held but
becomes the H level
Clock output is stopped
00
Automatic wait
Start operation
Writing data C
Reserved stop
C
Bit0 Bit1 Bit2 Bit3 Bit4 Bit5
Bit0 Bit1 Bit2 Bit3 Bit4 Bit5 Bit6 Bit7
Writing data D
Reserved stop
01
Data C
An interrupt is generated
D
case of reserved stop
Data C
after transmission in
Forced stop has priority
over reserved stop
Forced stop
TMP89FS60
00