TMPM361F10FG Toshiba, TMPM361F10FG Datasheet - Page 576
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TMPM361F10FG
Manufacturer Part Number
TMPM361F10FG
Description
Manufacturer
Toshiba
Datasheet
1.TMPM361F10FG.pdf
(702 pages)
Specifications of TMPM361F10FG
Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
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Rom (kbytes)
1024K
Rom Type
Flash
Ram (kbytes)
64K
Number Of Pins
100
Package
LQFP(14Ã?14)
Vcc
3V
Cpu Mhz
64
Ssp (ch) Spi
1
I2c/sio (ch)
3
Uart/sio (ch)
5
Usb
-
Can
-
Ethernet
-
External Bus Interface
Y
Cs/wait Controller (ch)
4
Dma Controller
2
10-bit Da Converter
-
10-bit Ad Converter
8
12-bit Ad Converter
-
16-bit Timer / Counter
16
Motor / Igbt Control
-
Real Time Clock
1
Watchdog Timer
Y
Osc Freq Detect
-
Clock Gear
Y
Low-power Hold Function
Y
Remote Control Interface
Y
Hardware Cec Controller
Y
Comparators
-
Low-voltage Detector
-
Etm Hardware Trace
4-bit
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20.3
Registers
20.3.14
31-16
15-6
5-2
1
0
bit symbol
After reset
bit symbol
After reset
bit symbol
After reset
bit symbol
After reset
Bit
−
ADR4[9:0]
−
OVR4
ADR4RF
Bit Symbol
Note:Access to this register must be a half word or a word access.
ADREG4C (AD Conversion Result Register 4C)
31
23
15
0
0
0
7
0
-
-
ADR4
R
R
R
R
R
Type
30
22
14
0
0
0
6
0
-
-
Read as "0".
AD conversion result
Conversion result is stored. For information about the correlation between the conversion channel and the
conversion result register, refer to the Table 20-2 in 20.4.5.7.
Read as "0".
Overrun flag
0: Not generated
1: Generated
If the conversion result is overwritten before reading <ADR4>, "1" is set.
This bit is "0" cleared when it is read.
AD conversion result storage flag
0:Conversion result is not stored
1: Conversion result is stored.
If a conversion result is stored, "1" is set.
This bit is "0" cleared when the conversion result is read.
29
21
13
0
0
0
5
0
-
-
-
Page 552
28
20
12
0
0
0
4
0
-
-
-
ADR4
27
19
11
Function
0
0
0
3
0
-
-
-
26
18
10
0
0
0
2
0
-
-
-
OVR4
25
17
0
0
9
0
1
0
-
-
TMPM361F10FG
ADR4RF
24
16
0
0
8
0
0
0
-
-
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