73S1217F Maxim, 73S1217F Datasheet - Page 68

• Manufacturer Part Number: 73S1217F
• Description: The Teridian 73S1217F is a self-contained SoC smart card reader IC that is an ideal solution for any USB-connected ISO 7816 design
• Manufacturer: Maxim

a valid key is detected, an interrupt is generated and the valid value of the pressed key is automatically
written into the
the 32768Hz crystal or the 12MHz crystal. The selection of the clock source is made external to this
block, by setting bit 3 – 32KBEN – in the
section). Disabling the 32kHz oscillator will source the 1kHz clock from the 12MHz main oscillator and
divide it down. Setting bit 6 – KBEN – in the
debouncing. The keypad size can be adjusted within the
Normal scanning is performed by hardware when the bit SCNEN is set at 1 in the
checking each sense line is the scan time and is defined by firmware in the
SCTIME). Scan times from 1ms to 4ms are supported. Scanning order does not affect the scan time.
This scanning continues until the entire keypad is scanned. If only one key is pressed, a valid key is
detected. Simultaneous key presses are not considered as valid (If two keys are pressed, no key is
reported to firmware).
Possible scrambling of the column scan order is provided by means of the
registers that define the order of column scanning. Values in these registers must be updated every time
a new keyboard scan order is desired. It is not possible to change the order of scanning the sense lines.
The column and row intersection for the detected valid key are stored in the
When a valid key is detected, an interrupt is generated. Firmware can then read those registers to
determine which key had been pressed. After reading the
update the
When the SCNEN bit is enabled in the
after a valid key has been identified. The hardware does not wait for the firmware to service the interrupt
in order to proceed with the key scanning process. Once the valid key (or invalid key – e.g. two keys
pressed) is detected, the hardware waits for the key to be released. Once the key is released, the
debounce timer is started. If the key is not still released after the debounce time, the debounce counter
starts again. After a key release, all columns will be driven low as before and the process will repeat
waiting for any key to be pressed.
When the SCNEN bit is disabled, all drive outputs are set to the value in the
clears the SCNEN bit in the middle of a key scan, the
there which will then be reflected on the output pins.
A bypass mode is provided so that the firmware can do the key scanning manually (SCNEN bit must be
cleared). In bypass mode, the firmware writes/reads the Column and Row registers to perform the key
scanning.
column scanning at an adjustable scanning rate and column scanning order through registers
and
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does not occur until a key-press is detected. Once hardware key scanning is enabled, the hardware
drives all column outputs low and waits for a low to be detected on one of the inputs. When a low is
detected on any row, and before key scanning starts, the hardware checks that the low level is still
detected after a debounce time. The debounce time is defined by firmware in the
7:0, DBTIME). Debounce times from 4ms to 256ms in 4ms increments are supported. If a key is not
pressed after the debounce time, the hardware will go back to looking for any input to be low. If a key is
confirmed to be pressed, key scanning begins.
Key scanning asserts one of the 5 drive lines (COL 4:0) low and looks for a low on a sense line indicating
that a key is pressed at the intersection of the drive/sense line in the keypad. After all sense lines have
been checked without a key-press being detected, the next column line is asserted. The time between
68
shows the flowchart of how the hardware scanning operates. In order to minimize power, scanning
KORDERL
KORDERL
KCOL
/ KORDERH. Key scanning is disabled at reset and must be enabled by firmware. When
and
/
KORDERH
KROW
registers. The keypad interface uses a 1kHz clock derived from either
registers if a new scan order is needed.
KSTAT
MCLKCtl
MCLKCtl
register, the
register, see the oscillator and clock generation
KCOL
register will enable keypad scanning and
KSIZE
KCOL
KCOL
register contains the last value stored in
register.
and
and
KROW
KROW
KORDERL
KSCAN
KCOL
KCOL
registers, the firmware can
registers are only updated
KSTAT
KSCAN
and
register. If firmware
register (bits 0:1 –
and
KROW
register.
register (bits
KORDERH
KSCAN
registers.
Rev. 1.2
Figure