73S1217F Maxim, 73S1217F Datasheet - Page 50

• Manufacturer Part Number: 73S1217F
• Description: The Teridian 73S1217F is a self-contained SoC smart card reader IC that is an ideal solution for any USB-connected ISO 7816 design
• Manufacturer: Maxim

Interrupt Enable 0 Register (IEN0): 0xA8
Interrupt Enable 1 Register (IEN1): 0xB8
50
IEN0.7
IEN0.6
IEN0.5
IEN0.4
IEN0.3
IEN0.2
IEN0.1
IEN0.0
IEN1.7
IEN1.6
IEN1.5
IEN1.4
IEN1.3
IEN1.2
IEN1.1
IEN1.0
Bit
Bit
MSB
MSB
Symbol
Symbol
SWDT
EAL
WDT
EAL
ES0
ET1
EX1
ET0
EX0
EX6
EX5
EX4
EX3
EX2
–
–
–
–
SWDT
WDT
EAL = 0 – disable all interrupts.
Watchdog timer refresh flag.
Set to initiate a refresh of the watchdog timer. Must be set directly before
SWDT is set to prevent an unintentional refresh of the watchdog timer. WDT
is reset by hardware 12 clock cycles after it has been set.
ES0 = 0 – disable serial channel 0 interrupt.
ET1 = 0 – disable timer 1 overflow interrupt.
EX1 = 0 – disable external interrupt 1.
ET0 = 0 – disable timer 0 overflow interrupt.
EX0 = 0 – disable external interrupt 0.
Watchdog timer start/refresh flag. Set to activate/refresh the watchdog
timer. When directly set after setting WDT, a watchdog timer refresh is
performed. Bit SWDT is reset by the hardware 12 clock cycles after it has
been set.
EX6 = 0 – disable external interrupt 6.
EX5 = 0 – disable external interrupt 5.
EX4 = 0 – disable external interrupt 4.
EX3 = 0 – disable external interrupt 3.
EX2 = 0 – disable external interrupt 2.
EX6
ET2
Table 43: The IEN0 Register
Table 44: The IEN1 Register
EX5
ES0
0x00
0x00
ET1
EX4
Function
Function
EX1
EX3
ET0
EX2
EX0
LSB
LSB
Rev. 1.2