73S1217F Maxim, 73S1217F Datasheet - Page 23

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73S1217F

Manufacturer Part Number
73S1217F
Description
The Teridian 73S1217F is a self-contained SoC smart card reader IC that is an ideal solution for any USB-connected ISO 7816 design
Manufacturer
Maxim
Datasheet
1.6 Instruction Set
All instructions of the generic 8051 microcontroller are supported. A complete list of the instruction set
and of the associated op-codes is contained in the 73S12xxF Software User’s Guide.
and of the associated op-codes is contained in the 73S12xxF Software User’s Guide.
1.7 Peripheral Descriptions
1.7 Peripheral Descriptions
1.7.1
1.7.1
The 73S1217F has two oscillator circuits; one for the main CPU clock and another for the RTC. The
The 73S1217F has two oscillator circuits; one for the main CPU clock and another for the RTC. The
main oscillator circuit is designed to operate with various crystal or external clock frequencies. An
main oscillator circuit is designed to operate with various crystal or external clock frequencies. An
internal divider working in conjunction with a PLL and VCO provides a 96MHz internal clock within the
internal divider working in conjunction with a PLL and VCO provides a 96MHz internal clock within the
73S1217F. 96 MHz is the required frequency for proper operation of specific peripheral blocks such as
73S1217F. 96 MHz is the required frequency for proper operation of specific peripheral blocks such as
the USB, specific timers, ISO 7816 UART and interfaces, Step-up converter, and keypad. The clock
the USB, specific timers, ISO 7816 UART and interfaces, Step-up converter, and keypad. The clock
generation and control circuits are shown in
generation and control circuits are shown in
Rev. 1.2
Oscillator and Clock Generation
Oscillator and Clock Generation
X32OUT
X12OUT
X32IN
X12IN
CPUCKDiv
MCount(2:0)
12.00MHz
32768Hz
32KOSCenb
Figure 3: Clock Generation and Control Circuits
HIGH
XTAL
XTAL
LOW
OSC
OSC
SCCKenb
See SC Clock descriptions for more accurate diagram
Prescaler 6bits
Prescaler 6bits
CPU CLOCK
HCLK
DIVIDER
SC/SCE
CLOCK
CLOCK
SCLK
6 bits
DIVIDE
DIVIDE
by 120
by 96
LCLK=32768Hz
12.00MHz
HOSCen
Figure
Figure
Phase
Freq
DET
M DIVIDER
/(2*N + 4)
1.5-48MHz
7.386MHz
3.
3.
SELSC
VCO
SEL
MCLK
96MHz
ETU CLOCK
DIVIDER
12 bits
LMCLK=32765Hz
USBCKenb
Mux
DIVIDER
MPU CLOCK - CPCLK
SMART CARD LOGIC
/2930
div 2
BLOCK CLOCK
DIV
32
RTCCLK
KEYCLK
SCECLK
ETUCLK
I2CCLK
USBCLK
3.6923MHz
CLK1M
SCCLK
I2C_2x
7.386MHz
48MHz
1kHz
ICLK
400kHz
800kHz
1MHz
23

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