ST72264G2 STMicroelectronics, ST72264G2 Datasheet - Page 33

• Manufacturer Part Number: ST72264G2
• Description: 8-bit MCU
• Manufacturer: STMicroelectronics

Specifications of ST72264G2

• 4 K Or 8 Kbytes Program Memory: ROM or single voltage extended Flash (XFlash) with read-out protection, write protection, In-Circuit Programming and In-Application Programming (ICP and IAP). 10K write/erase cycles guaranteed, data retention
• Clock Sources: crystal/ceramic resonator oscillators, internal RC oscillator and bypass for external clock
• 4 Power Saving Modes: Halt, Active Halt,Wait and Slow
• Two 16-bit Timers With: 2 input captures, 2 output compares, external clock input on one timer, PWM and Pulse generator modes

8 POWER SAVING MODES
8.1 INTRODUCTION
To give a large measure of flexibility to the applica-
tion in terms of power consumption, three main
power saving modes are implemented in the ST7
(see
After a RESET the normal operating mode is se-
lected by default (RUN mode). This mode drives
the device (CPU and embedded peripherals) by
means of a master clock which is based on the
main oscillator frequency divided by 2 (f
From Run mode, the different power saving
modes may be selected by setting the relevant
register bits or by calling the specific ST7 software
instruction whose action depends on the oscillator
status.
Figure 20. Power Saving Mode Transitions
Figure
20).
SLOW WAIT
POWER CONSUMPTION
SLOW
HALT
WAIT
RUN
Low
High
CPU
).
8.2 SLOW MODE
This mode has two targets:
– To reduce power consumption by decreasing the
– To adapt the internal clock frequency (f
SLOW mode is controlled by three bits in the
MISR1 register: the SMS bit which enables or dis-
ables Slow mode and two CPx bits which select
the internal slow frequency (f
In this mode, the oscillator frequency can be divid-
ed by 4, 8, 16 or 32 instead of 2 in normal operat-
ing mode. The CPU and peripherals are clocked at
this lower frequency.
Note: SLOW-WAIT mode is activated when enter-
ring the WAIT mode while the device is already in
SLOW mode.
Figure 21. SLOW Mode Clock Transitions
internal clock in the device,
the available supply voltage.
ST72260Gx, ST72262Gx, ST72264Gx
CP1:0
SMS
f
CPU
f
OSC2
f
FREQUENCY
OSC2
00
NEW SLOW
REQUEST
/2
01
CPU
f
OSC2
NORMAL RUN MODE
).
/4
REQUEST
CPU
f
OSC2
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) to