ST72561J6-Auto STMicroelectronics, ST72561J6-Auto Datasheet - Page 318

• Manufacturer Part Number: ST72561J6-Auto
• Description: 8-bit MCU for automotive
• Manufacturer: STMicroelectronics

Specifications of ST72561J6-Auto

• Hdflash Endurance: 100 cycles, data retention 20 years at 55 °C
• 5 Power Saving Modes: halt, auto wake up from halt, active halt, wait and slow

Important notes
24.1.4
24.1.5
318/324
PUSH CC
.ext1_rt; entry to interrupt routine
LD A, #$00
LD sema, A
IRET
Unexpected reset fetch
If an interrupt request occurs while a "POP CC" instruction is executed, the interrupt
controller does not recognize the source of the interrupt and, by default, passes the RESET
vector address to the CPU.
Workaround
To solve this issue, a "POP CC" instruction must always be preceded by a "SIM" instruction.
Header time-out does not prevent wake-up from mute mode
Normally, when LINSCI is configured in LIN slave mode, if a header time-out occurs during a
LIN header reception (that is, header length > 57 bits), the LIN Header Error bit (LHE) is set,
an interrupt occurs to inform the application but the LINSCI should stay in mute mode,
waiting for the next header reception.
Problem description
The LINSCI sampling period is Tbit / 16. If a LIN Header time-out occurs between the 9th
and the 15th sample of the Identifier Field Stop Bit (refer to
up from mute mode. Nevertheless, LHE is set and LIN Header Detection Flag (LHDF) is
kept cleared.
In addition, if LHE is reset by software before this 15th sample (by accessing the SCISR
register and reading the SCIDR register in the LINSCI interrupt routine), the LINSCI will
generate another LINSCI interrupt (due to the RDRF flag setting).
Impact on application
Software may execute the interrupt routine twice after header reception.
Moreover, in reception mode, as the receiver is no longer in mute mode, an interrupt will be
generated on each data byte reception.
Workaround
The problem can be detected in the LINSCI interrupt routine. In case of timeout error (LHE
is set and LHLR is loaded with 00h), the software can check the RWU bit in the SCICR2
register. If RWU is cleared, it can be set by software. Refer to
shown in bold characters.
Doc ID 12370 Rev 8
Figure
Figure
155), the LINSCI wakes
156. Workaround is
ST72561-Auto