ST7232AJ2 STMicroelectronics, ST7232AJ2 Datasheet - Page 123

• Manufacturer Part Number: ST7232AJ2
• Description: 8-BIT MCU WITH 8K FLASH/ROM, ADC, 4 TIMERS, SPI, SCI INTERFACE
• Manufacturer: STMicroelectronics

Specifications of ST7232AJ2

• Hdflash Endurance: 100 cycles, data retention
• Clock Sources: crystal/ceramic resonator oscillators and bypass for external clock
• Four Power Saving Modes: Halt, Active-Halt, Wait and Slow
• Main Clock Controller With: Real time base, Beep and Clock-out capabilities
• Two 16-bit Timers With: 2 input captures, 2 output compares, PWM and pulse generator modes

CLOCK CHARACTERISTICS (Cont’d)
12.5.4 PLL Characteristics
Note:
1. Data characterized but not tested.
The user must take the PLL jitter into account in the application (for example in serial communication or
sampling of high frequency signals). The PLL jitter is a periodic effect, which is integrated over several
CPU cycles. Therefore the longer the period of the application signal, the less it will be impacted by the
PLL jitter.
Figure 65
cies of less than 125KHz, the jitter is negligible.
Figure 65. Integrated PLL Jitter vs signal frequency
Note 1: Measurement conditions: f
f
∆ f
OSC
Symbol
CPU
+/-Jitter (%)
/ f
1.2
0.8
0.6
0.4
0.2
CPU
1
0
shows the PLL jitter integrated on application signals in the range 125kHz to 2MHz. At frequen-
4 MHz
PLL input frequency range
Instantaneous PLL jitter
2 MHz
Parameter
Application Frequency
1 MHz 500 kHz 250 kHz 125 kHz
1)
CPU
= 8MHz.
f
OSC
max
typ
= 4 MHz.
Conditions
1
Min
2
Typ
0.7
Max
4
2
ST7232A
123/157
MHz
Unit
%
1