ST7LITE25F2 STMicroelectronics, ST7LITE25F2 Datasheet - Page 122

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ST7LITE25F2

Manufacturer Part Number
ST7LITE25F2
Description
8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY, DATA EEPROM, ADC, TIMERS, SPI
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST7LITE25F2

8 Kbytes Single Voltage Flash Program Memory With Read-out Protection, In-circuit Programming And In-application Programming (icp And Iap). 10k Write/erase Cycles Guaranteed, Data Retention
20 years at 55˚C.
Clock Sources
Internal 1% RC oscillator, crystal/ceramic resonator or external clock
Five Power Saving Modes
Halt, Active-Halt, Wait and Slow, Auto Wake Up From Halt
ST7LITE2
15 DEVICE CONFIGURATION
Each device is available for production in user pro-
grammable versions (FLASH) as well as in factory
coded versions (FASTROM).
ST7FLITE2
ST7PLITE2 devices are Factory Advanced Serv-
ice Technique ROM (FASTROM) versions: they
are factory programmed FLASH devices.
ST7FLITE2 devices are shipped to customers with
a default program memory content (FFh), while
FASTROM factory coded parts contain the code
supplied by the customer. This implies that FLASH
devices have to be configured by the customer us-
ing the Option Bytes while the FASTROM devices
are factory configured.
15.1 OPTION BYTES
The two option bytes allow the hardware configu-
ration of the microcontroller to be selected.
The option bytes can be accessed only in pro-
gramming mode (for example using a standard
ST7 programming tool).
OPTION BYTE 0
OPT7 = Reserved, must always be 1.
OPT6:4 = OSCRANGE[2:0] Oscillator range
When the internal RC oscillator is not selected
(Option OSC=1), these option bits select the range
of the resonator oscillator current source or the ex-
ternal clock source.
122/133
Default
Typ.
frequency
range with
Resonator
Value
Res.
7
1
LP
MP
MS
HS
VLP 32.768kHz
devices
1
OSCRANGE
8~16MHz
1~2MHz
2~4MHz
4~8MHz
2:0
1
OPTION BYTE 0
are
1
FLASH
SEC1 SEC0
2
0
0
0
0
1
1
OSCRANGE
1
0
0
1
1
0
1
versions.
FMP
R
0
0
0
1
0
1
0
FMP
W
0
0
Note: When the internal RC oscillator is selected,
the OSCRANGE option bits must be kept at their
default value in order to select the 256 clock cycle
delay (see
OPT3:2 = SEC[1:0] Sector 0 size definition
These option bits indicate the size of sector 0 ac-
cording to the following table.
OPT1 = FMP_R Read-out protection
Readout protection, when selected provides a pro-
tection against program memory content extrac-
tion and against write access to Flash memory.
Erasing the option bytes when the FMP_R option
is selected will cause the whole memory to be
erased first and the device can be reprogrammed.
Refer to the ST7 Flash Programming Reference
Manual and
tails
0: Read-out protection off
1: Read-out protection on
OPT0 = FMP_W FLASH write protection
This option indicates if the FLASH program mem-
ory is write protected.
Warning: When this option is selected, the pro-
gram memory (and the option bit itself) can never
be erased or programmed again.
0: Write protection off
1: Write protection on
External
Clock source:
CLKIN
Sector 0 Size
x4x8
PLL
1
7
0.5k
1k
2k
4k
OFF
PLL
1
Reserved
Section
section 4.5 on page 14
PLL32
on OSC1
on PB4
OFF
1
OPTION BYTE 1
7.5).
SEC1
OSC LVD1 LVD0
0
0
1
1
0
1
2
1
1
1
OSCRANGE
1
for more de-
SEC0
WDG
1
0
1
1
SW
1
0
1
0
1
HALT
WDG
0
0
1
1
0
1

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