ST72561R9-Auto STMicroelectronics, ST72561R9-Auto Datasheet - Page 183

• Manufacturer Part Number: ST72561R9-Auto
• Description: 8-bit MCU for automotive
• Manufacturer: STMicroelectronics

Specifications of ST72561R9-Auto

• Hdflash Endurance: 100 cycles, data retention 20 years at 55 °C
• 5 Power Saving Modes: halt, auto wake up from halt, active halt, wait and slow

ST72561-Auto
15.9.7
Figure 84. LDIV read / write operations when LDUM = 0
Figure 85. LDIV read / write operations when LDUM = 1
LINSCI clock tolerance
LINSCI clock tolerance when unsynchronized
When LIN slaves are unsynchronized (meaning no characters have been transmitted for a
relatively long time), the maximum tolerated deviation of the LINSCI clock is +/-15%.
If the deviation is within this range then the LIN synch break is detected properly when a
new reception occurs.
This is made possible by the fact that masters send 13 low bits for the LIN synch break,
which can be interpreted as 11 low bits (13 bits -15% = 11.05) by a “fast” slave and then
considered as a LIN synch break. According to the LIN specification, a LIN synch break is
valid when its duration is greater than t
must last at least 11 low bits.
Write LPR
Write LPR
Read LPR
Read LPR
MANT(7:0)
MANT(7:0)
MANT(7:0)
MANT(7:0)
Write LPFR
Write LPFR
Write LPR
RDRF = 1
Read LPFR
Read LPFR
LINSCI serial communication interface (LIN master/slave)
Doc ID 12370 Rev 8
FRAC(3:0)
FRAC(3:0)
FRAC(3:0)
FRAC(3:0)
Synch Field
SBRKTS
Synch Field
LDIV
LDIV
LDIV_NOM
at end of
LDIV_NOM
at end of
MANT(7:0)
= 10. This means that the LIN synch break
MANT(7:0)
Update
Update
FRAC(3:0)
Baud Rate
Generation
FRAC(3:0)
Baud Rate
Generation
LIN Sync Field
Measurement
LIN Sync Field
Measurement
LDIV_MEAS
LDIV_MEAS
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