STM32W108HB STMicroelectronics, STM32W108HB Datasheet - Page 193

• Manufacturer Part Number: STM32W108HB
• Description: High-performance, IEEE 802.15.4 wireless system-on-chip with embedded Flash memory
• Manufacturer: STMicroelectronics

Specifications of STM32W108HB

• Receive Current (w/ Cpu): 27 mA
• Transmit Current (w/ Cpu, +3 Dbm Tx): 31 mA
• Low Deep Sleep Current, With Retained Ram And Gpio: 400 nA/800 nA with/without sleep timer
• Standard Arm Debug Capabilities: Flash patch & breakpoint; data watchpoint & trace; instrumentation trace macrocell
• Single Voltage Operation: 2.1-3.6 V with internal 1.8 V and 1.25 V regulators

STM32W108HB STM32W108CC STM32W108CB STM32W108CZ
12.3
12.3.1
Table 125. Top-level set interrupts configuration register (INT_CFGSET)
INT_IR
QD
31
15
rw
INT_IR
QC
30
14
rw
Nested vectored interrupt controller (NVIC) interrupts
Top-level set interrupts configuration register (INT_CFGSET)
Address:
Reset value:
Bit 16
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
INT_IR
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
QB
29
13
rw
INT_DEBUG: Write 1 to enable debug interrupt. (Writing 0 has no effect.)
INT_IRQD: Write 1 to enable IRQD interrupt. (Writing 0 has no effect.)
INT_IRQC: Write 1 to enable IRQC interrupt. (Writing 0 has no effect.)
INT_IRQB: Write 1 to enable IRQB interrupt. (Writing 0 has no effect.)
INT_IRQA: Write 1 to enable IRQA interrupt. (Writing 0 has no effect.)
INT_ADC: Write 1 to enable ADC interrupt. (Writing 0 has no effect.)
INT_MACRX: Write 1 to enable MAC receive interrupt. (Writing 0 has no effect.)
INT_MACTX: Write 1 to enable MAC transmit interrupt. (Writing 0 has no effect.)
INT_MACTMR: Write 1 to enable MAC timer interrupt. (Writing 0 has no effect.)
INT_SEC: Write 1 to enable security interrupt. (Writing 0 has no effect.)
INT_SC2: Write 1 to enable serial controller 2 interrupt. (Writing 0 has no effect.)
INT_SC1: Write 1 to enable serial controller 1 interrupt. (Writing 0 has no effect.)
INT_SLEEPTMR: Write 1 to enable sleep timer interrupt. (Writing 0 has no effect.)
INT_BB: Write 1 to enable baseband interrupt. (Writing 0 has no effect.)
INT_MGMT: Write 1 to enable management interrupt. (Writing 0 has no effect.)
INT_TIM2: Write 1 to enable timer 2 interrupt. (Writing 0 has no effect.)
INT_TIM1: Write 1 to enable timer 1 interrupt. (Writing 0 has no effect.)
INT_IR
QA
28
12
rw
INT_A
DC
27
11
rw
0xE000E100
0x0000 0000
INT_M
ACRX
26
10
rw
INT_M
ACTX
25
rw
9
Doc ID 16252 Rev 13
Reserved
INT_M
ACTM
24
rw
R
8
INT_S
EC
23
rw
7
INT_S
C2
22
rw
6
INT_S
C1
21
rw
5
LEEPT
INT_S
MR
20
rw
4
INT_B
19
rw
3
B
INT_M
GMT
18
rw
2
INT_TI
Interrupts
M2
17
rw
1
193/232
INT_TI
INT_D
EBUG
M1
16
rw
rw
0