STM32W108HB STMicroelectronics, STM32W108HB Datasheet - Page 119

• Manufacturer Part Number: STM32W108HB
• Description: High-performance, IEEE 802.15.4 wireless system-on-chip with embedded Flash memory
• Manufacturer: STMicroelectronics

Specifications of STM32W108HB

• Receive Current (w/ Cpu): 27 mA
• Transmit Current (w/ Cpu, +3 Dbm Tx): 31 mA
• Low Deep Sleep Current, With Retained Ram And Gpio: 400 nA/800 nA with/without sleep timer
• Standard Arm Debug Capabilities: Flash patch & breakpoint; data watchpoint & trace; instrumentation trace macrocell
• Single Voltage Operation: 2.1-3.6 V with internal 1.8 V and 1.25 V regulators

STM32W108HB STM32W108CC STM32W108CB STM32W108CZ
10.1.2
Counter modes
Up-counting mode
In up-counting mode, the counter counts from 0 to the auto-reload value (contents of the
TIMx_ARR register), then restarts from 0 and generates a counter overflow event.
An update event can be generated at each counter overflow, by setting the TIM_UG bit in
the TIMx_EGR register, or by using the slave mode controller.
Software can disable the update event by setting the TIM_UDIS bit in the TIMx_CR1
register, to avoid updating the shadow registers while writing new values in the buffer
registers. No update event will occur until the TIM_UDIS bit is written to 0. Both the counter
and the prescalar counter restart from 0, but the prescale rate does not change. In addition,
if the TIM_URS bit in the TIMx_CR1 register is set, setting the TIM_UG bit generates an
update event but without setting the INT_TIMUIF flag. Thus no interrupt request is sent. This
avoids generating both update and capture interrupts when clearing the counter on the
capture event.
When an update event occurs, the update flag (the INT_TIMUIF bit in the INT_TIMxFLAG
register) is set (unless TIM_USR is 1) and the following registers are updated:
●
●
Figure
behavior for different clock frequencies when TIMx_ARR = 0x36.
Figure 17. Counter timing diagram, internal clock divided by 1
The buffer of the prescaler is reloaded with the buffer value (contents of the TIMx_PSC
register).
The auto-reload shadow register is updated with the buffer value (TIMx_ARR).
17,
Figure
18,
Figure
19, and
Doc ID 16252 Rev 13
Figure 20
show some examples of the counter
General-purpose timers
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