STM32W108HB STMicroelectronics, STM32W108HB Datasheet - Page 142

• Manufacturer Part Number: STM32W108HB
• Description: High-performance, IEEE 802.15.4 wireless system-on-chip with embedded Flash memory
• Manufacturer: STMicroelectronics

Specifications of STM32W108HB

• Receive Current (w/ Cpu): 27 mA
• Transmit Current (w/ Cpu, +3 Dbm Tx): 31 mA
• Low Deep Sleep Current, With Retained Ram And Gpio: 400 nA/800 nA with/without sleep timer
• Standard Arm Debug Capabilities: Flash patch & breakpoint; data watchpoint & trace; instrumentation trace macrocell
• Single Voltage Operation: 2.1-3.6 V with internal 1.8 V and 1.25 V regulators

General-purpose timers
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Slave mode: Gated mode
In Gated mode the counter is enabled depending on the level of a selected input.
In the following example, the up-counter counts only when the TI1 input is low:
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The counter starts counting on the internal clock as long as TI1 is low and stops as soon as
TI1 becomes high. The INT_TIMTIF flag in the INT_TIMxFLAG register is set when the
counter starts and when it stops.
The delay between the rising edge on TI1 and the actual stop of the counter is due to the
resynchronization circuit on the TI1 input.
Figure 42. Control circuit in Gated mode
Configure channel 1 to detect low levels on TI1 Configure the input filter duration. In
this example, no filter is required, so TIM_IC1F = 0000. The capture prescaler is not
used for triggering, so it is not configured. The TIM_CC1S bits select the input capture
source only, TIM_CC1S = 01 in the TIMx_CCMR1 register. Write TIM_CC1P = 1 in the
TIMx_CCER register to validate the polarity (and detect low level only).
Configure the timer in Gated mode by writing TIM_SMS = 101 in the TIMx_SMCR
register. Select TI1 as the input source by writing TIM_TS = 101 in the TIMx_SMCR
register.
Enable the counter by writing TIM_CEN = 1 in the TIMx_CR1 register. In Gated mode,
the counter does not start if TIM_CEN = 0, regardless of the trigger input level.
STM32W108HB STM32W108CC STM32W108CB STM32W108CZ
Doc ID 16252 Rev 13