PSMN3R5-30YL NXP Semiconductors, PSMN3R5-30YL Datasheet - Page 3

• Manufacturer Part Number: PSMN3R5-30YL
• Description: Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using TrenchMOS technology
• Manufacturer: NXP Semiconductors

NXP Semiconductors
4. Limiting values
Table 4.
In accordance with the Absolute Maximum Rating System (IEC 60134).
[1]
PSMN3R5-30YL
Product data sheet
Symbol
V
V
V
V
I
I
P
T
T
Source-drain diode
I
I
Avalanche ruggedness
E
D
DM
S
SM
Fig 1.
stg
j
DS
DSM
DGR
GS
tot
DS(AL)S
Continuous current is limited by package.
(A)
I
D
120
100
80
60
40
20
0
mounting base temperature
Continuous drain current as a function of
0
Limiting values
Parameter
drain-source voltage
peak drain-source voltage
drain-gate voltage
gate-source voltage
drain current
peak drain current
total power dissipation
storage temperature
junction temperature
source current
peak source current
non-repetitive drain-source
avalanche energy
(1)
50
100
150
T
All information provided in this document is subject to legal disclaimers.
003aad989
mb
(°C)
200
Conditions
T
t
E
T
V
V
pulsed; t
Figure 3
T
T
pulsed; t
V
V
p
Rev. 4 — 9 March 2011
j
j
mb
mb
DS(AL)
GS
GS
GS
sup
≤ 25 ns; f ≤ 500 kHz;
≥ 25 °C; T
≥ 25 °C; T
= 25 °C; see
= 25 °C
= 10 V; T
= 10 V; T
= 10 V; T
≤ 30 V; R
≤ 180 nJ; pulsed
p
p
≤ 10 µs; T
≤ 10 µs; T
N-channel 30 V 3.5 mΩ logic level MOSFET in LFPAK
j
j
Fig 2.
≤ 175 °C
≤ 175 °C; R
mb
mb
j(init)
GS
= 100 °C; see
= 25 °C; see
= 50 Ω; unclamped
P
Figure 2
(%)
= 25 °C; I
der
120
80
40
mb
mb
0
function of mounting base temperature
Normalized total power dissipation as a
0
= 25 °C; see
= 25 °C
GS
D
= 20 kΩ
= 100 A;
Figure 1
Figure 1
50
PSMN3R5-30YL
100
[1]
[1]
[1]
Min
-
-
-
-20
-
-
-
-
-55
-55
-
-
-
150
© NXP B.V. 2011. All rights reserved.
T
mb
175
175
Max
30
35
30
20
86
100
447
74
100
447
54
03aa16
(°C)
200
Unit
V
V
V
V
A
A
A
W
°C
°C
A
A
mJ
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