LPC2939 NXP Semiconductors, LPC2939 Datasheet - Page 50

• Manufacturer Part Number: LPC2939
• Description: The LPC2939 combine an ARM968E-S CPU core with two integrated TCM blocksoperating at frequencies of up to 125 MHz, Full-speed USB 2
• Manufacturer: NXP Semiconductors

NXP Semiconductors
LPC2939_3
Product data sheet
6.15.7.1 Pin description
6.15.7.2 Clock description
6.16 Power, Clock and Reset control SubSystem (PCRSS)
The QEI module in the MSCSS has the following pins. These are combined with other
functions on the port pins of the LPC2939.
Table 26.
The QEI module is clocked by CLK_MSCSS_QEI, see
this clock is identical to CLK_MSCSS_APB since they are derived from the same base
clock BASE_MSCSS_CLK.
If the QEI is not used its CLK_MSCSS_QEI branch clock can be switched off.
The Power, Clock and Reset Control Subsystem in the LPC2939 includes a Clock
Generator Unit (CGU), a Reset Generator Unit (RGU), and a Power Management Unit
(PMU).
Figure 11
communication with the AHB system bus.
Symbol
QEI0 IDX
QEI0 PHA
QEI0 PHB
provides an overview of the PCRSS. An AHB-to-DTL bridge controls the
QEI pins
All information provided in this document is subject to legal disclaimers.
Pin name
IDX0
PHA0
PHB0
Rev. 03 — 7 April 2010
Direction
IN
IN
IN
ARM9 microcontroller with CAN, LIN, and USB
Table 26
Description
Index signal. Can be used to reset the position.
Sensor signal. Corresponds to PHA in
quadrature mode and to direction in
clock/direction mode.
Sensor signal. Corresponds to PHB in
quadrature mode and to clock signal in
clock/direction mode.
shows the QEI pins.
Section
6.7.2. The frequency of
LPC2939
© NXP B.V. 2010. All rights reserved.
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