LPC2939 NXP Semiconductors, LPC2939 Datasheet - Page 39

• Manufacturer Part Number: LPC2939
• Description: The LPC2939 combine an ARM968E-S CPU core with two integrated TCM blocksoperating at frequencies of up to 125 MHz, Full-speed USB 2
• Manufacturer: NXP Semiconductors

NXP Semiconductors
LPC2939_3
Product data sheet
6.14.1.1 Global acceptance filter
6.14.1.2 Pin description
6.14.2.1 Pin description
6.14.2 LIN
The global acceptance filter provides look-up of received identifiers - called acceptance
filtering in CAN terminology - for all the CAN controllers. It includes a CAN ID look-up table
memory, in which software maintains one to five sections of identifiers. The CAN ID
look-up table memory is 2 kB large (512 words, each of 32 bits). It can contain up to 1024
standard frame identifiers or 512 extended frame identifiers or a mixture of both types. It is
also possible to define identifier groups for standard and extended message formats.
The two CAN controllers in the LPC2939 have the pins listed below. The CAN pins are
combined with other functions on the port pins of the LPC2939.
pins (x runs from 0 to 1).
Table 20.
The LPC2939 contain two LIN 2.0 master controllers. These can be used as dedicated
LIN 2.0 master controllers with additional support for sync break generation and with
hardware implementation of the LIN protocol according to spec 2.0.
Remark: Both LIN channels can be also configured as UART channels.
The key features are:
The two LIN 2.0 master controllers in the LPC2939 have the pins listed below. The LIN
pins are combined with other functions on the port pins of the LPC2939.
the LIN pins. For more information see
Symbol
CANx TXD
CANx RXD
•
•
•
•
•
•
•
•
•
•
•
•
•
Listen-only mode (no acknowledge; no active error flags)
Reception of ‘own’ messages (self-reception request)
Full CAN mode for message reception
Complete LIN 2.0 message handling and transfer
One interrupt per LIN message
Slave response time-out detection
Programmable sync-break length
Automatic sync-field and sync-break generation
Programmable inter-byte space
Hardware or software parity generation
Automatic checksum generation
Fault confinement
Fractional baud rate generator
CAN pins
Pin name
TXDC0/1
RXDC0/1
All information provided in this document is subject to legal disclaimers.
Rev. 03 — 7 April 2010
Direction
OUT
IN
Ref. 1
ARM9 microcontroller with CAN, LIN, and USB
Description
CAN channel x transmit data output
CAN channel x receive data input
subsection 3.43, LIN master controller.
Table 20
LPC2939
© NXP B.V. 2010. All rights reserved.
Table 21
shows the CAN
shows
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