LPC2292_2294 NXP Semiconductors, LPC2292_2294 Datasheet - Page 14

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LPC2292_2294

Manufacturer Part Number
LPC2292_2294
Description
The LPC2292/2294 microcontrollers are based on a 16/32-bit ARM7TDMI-S CPU withreal-time emulation and embedded trace support, together with 256 kB of embeddedhigh-speed flash memory
Manufacturer
NXP Semiconductors
Datasheet
NXP Semiconductors
Table 4.
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
LPC2292_2294
Product data sheet
Symbol
V
V
V
DDA(1V8)
DD(3V3)
DDA(3V3)
LPC2294 only.
5 V tolerant pad providing digital I/O functions with TTL levels and hysteresis and 10 ns slew rate control.
SSP interface available on LPC2292/2294/01 only.
5 V tolerant pad providing digital I/O functions with TTL levels and hysteresis and 10 ns slew rate control. If configured for an input
function, this pad utilizes built-in glitch filter that blocks pulses shorter than 3 ns.
Open-drain 5 V tolerant digital I/O I
functionality. Open-drain configuration applies to all output functions on this pin.
5 V tolerant pad providing digital I/O (with TTL levels and hysteresis and 10 ns slew rate control) and analog input function. If configured
for a digital input function, this pad utilizes built-in glitch filter that blocks pulses shorter than 3 ns. When configured as an ADC input,
digital section of the pad is disabled.
5 V tolerant pad with built-in pull-up resistor providing digital I/O functions with TTL levels and hysteresis and 10 ns slew rate control.
The pull-up resistor’s value ranges from 60 k to 300 k.
5 V tolerant pad providing digital input (with TTL levels and hysteresis) function only.
Pad provides special analog functionality.
Pin description
Pin (LQFP)
143
2, 31, 39, 51,
57, 77, 94,
104, 112, 119
14
…continued
Pin
(TFBGA)
A2
B1, K3, M3,
M6, N8, K10,
F12, C13,
A11, B9
F3
2
C-bus 400 kHz specification compatible pad. It requires external pull-up to provide an output
All information provided in this document is subject to legal disclaimers.
[1]
Type
I
I
I
16/32-bit ARM microcontrollers with external memory interface
Rev. 8 — 8 June 2011
Description
Analog 1.8 V core power supply: This is the power supply
voltage for internal circuitry. This should be nominally the
same voltage as V
noise and error.
3.3 V pad power supply: This is the power supply voltage for
the I/O ports.
Analog 3.3 V pad power supply: This should be nominally
the same voltage as V
minimize noise and error.
DD(1V8)
DD(3V3)
but should be isolated to minimize
LPC2292/2294
but should be isolated to
© NXP B.V. 2011. All rights reserved.
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