LPC2292_2294 NXP Semiconductors, LPC2292_2294 Datasheet - Page 4

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LPC2292_2294

Manufacturer Part Number
LPC2292_2294
Description
The LPC2292/2294 microcontrollers are based on a 16/32-bit ARM7TDMI-S CPU withreal-time emulation and embedded trace support, together with 256 kB of embeddedhigh-speed flash memory
Manufacturer
NXP Semiconductors
Datasheet
NXP Semiconductors
4. Block diagram
LPC2292_2294
Product data sheet
Fig 1. Block diagram
P1[31:16], P1[1:0]
PWM6 to PWM1
EINT3 to EINT0
AIN3 to AIN0
AIN7 to AIN4
(1) When test/debug interface is used, GPIO/other functions sharing these pins are not available.
(2) Pins shared with GPIO.
(3) Available in LPC2294 only.
(4) SSP interface and high-speed GPIO are available on LPC2292/2294/01 only.
4 × CAP0
4 × CAP1
4 × MAT0
4 × MAT1
P0[30:0]
P2[31:0]
P3[31:0]
P0, P1
CONTROLLER
LPC2292
LPC2294
INTERNAL
48 PINS TOTAL
HIGH-SPEED
SRAM
SRAM
16 kB
GPIO
SYSTEM CONTROL
REAL-TIME CLOCK
A/D CONVERTER
TIMER 0/TIMER 1
ARM7 local bus
PURPOSE I/O
(4)
INTERRUPTS
EXTERNAL
CAPTURE/
COMPARE
GENERAL
PWM0
CONTROLLER
INTERNAL
FLASH
FLASH
256 kB
All information provided in this document is subject to legal disclaimers.
TRST
16/32-bit ARM microcontrollers with external memory interface
ARM7TDMI-S
(1)
TMS
Rev. 8 — 8 June 2011
TEST/DEBUG
AHB BRIDGE
INTERFACE
AHB TO APB
TCK
(1)
BRIDGE
(1)
TDI
(1)
TDO
APB (advanced
peripheral bus)
(Advanced High-performance Bus)
(1)
DIVIDER
APB
system
AMBA AHB
clock
EXTERNAL MEMORY
SERIAL INTERFACE
SERIAL INTERFACE
I
PLL
2
UART0/UART1
CONTROLLER
C-BUS SERIAL
WATCHDOG
INTERFACE
SPI1/SSP
TIMER
SPI0
CAN
XTAL1
CONTROLLER
INTERRUPT
(4)
LPC2292/2294
VECTORED
FUNCTIONS
DECODER
SYSTEM
XTAL2
AHB
RESET
002aad184
© NXP B.V. 2011. All rights reserved.
CS3 to CS0
A23 to A0
BLS3 to BLS0
OE, WE
D31 to D0
SCL
SDA
SCK1
MOSI1
MISO1
SSEL1
SCK0
MOSI0
MISO0
SSEL0
TXD0, TXD1
RXD0, RXD1
DSR1, CTS1,
DCD1, RI1
TD2, TD1
RD2, RD1
TD4, TD3
RD4, RD3
(2)
(3)
(2)
(2)
(3)
4 of 54
(2)
(2)

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