LPC1857_53 NXP Semiconductors, LPC1857_53 Datasheet - Page 99
LPC1857_53
Manufacturer Part Number
LPC1857_53
Description
The LPC1857/53 are ARM Cortex-M3 based microcontrollers for embedded applications
Manufacturer
NXP Semiconductors
Datasheet
1.LPC1853FBD208.pdf
(131 pages)
- Current page: 99 of 131
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NXP Semiconductors
LPC1857_53
Objective data sheet
Table 14.
T
values.
[1]
Symbol
output
t
input
t
t
v(Q)
su(D)
h(D)
amb
Fig 22. I
Fig 23. I
I2Sx_RX_SCK
I2Sx_RX_SDA
I2Sx_TX_SCK
I2Sx_TX_SDA
I2Sx_RX_WS
I2Sx_TX_WS
Clock to the I
PCLK = BASE_APB1_CLK / 12. I
I
2
= 25
S-bus specification.
2
2
C; V
Parameter
data output valid time on pin I2Sx_TX_SDA
data input set-up time on pin I2Sx_RX_SDA
data input hold time
Dynamic characteristics: I
S-bus timing (transmit)
S-bus timing (receive)
DD(REG)(3V3)
2
S-bus interface BASE_APB1_CLK = 150 MHz; peripheral clock to the I
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 14 December 2011
= 3.3 V. Conditions and data refer to I2S0 and I2S1 pins. Simulated
t
t
WH
WH
2
S clock cycle time T
Conditions
on pin I2Sx_TX_WS
on pin I2Sx_RX_WS
on pin I2Sx_RX_SDA
on pin I2Sx_RX_WS
T
T
cy(clk)
cy(clk)
2
t
S-bus interface pins
v(Q)
t
v(Q)
t
t
WL
WL
t
su(D)
t
su(D)
cy(clk)
32-bit ARM Cortex-M3 microcontroller
= 79.2 ns, corresponds to the SCK signal in the
t
t
su(D)
h(D)
[1]
[1]
[1]
Min
-
-
-
-
-
t
t
LPC1857/53
f
f
Typ
4.4
4.3
0
0.20
3.7
3.9
© NXP B.V. 2011. All rights reserved.
2
S-bus interface
Max
-
-
-
-
-
t
t
r
r
002aag497
002aag498
99 of 131
Unit
ns
ns
ns
ns
ns
ns
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