STA308A13TR STMicroelectronics, STA308A13TR Datasheet - Page 16

IC AUDIO PROCESSOR DGTL 64-TQFP

STA308A13TR

Manufacturer Part Number
STA308A13TR
Description
IC AUDIO PROCESSOR DGTL 64-TQFP
Manufacturer
STMicroelectronics
Series
DDX™r
Type
Audio Processorr
Datasheet

Specifications of STA308A13TR

Mounting Type
Surface Mount
Package / Case
64-TQFP, 64-VQFP
Applications
Digital Audio
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Applications
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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0
I
5.3
5.3.1
5.3.2
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2
C bus operation
address and if a match is found, it acknowledges the identification on SDA bus during the
9
Write operation
Following the START condition the master sends a device select code with the RW bit set
to 0. The STA308A acknowledges this and the writes for the byte of internal address.
After receiving the internal byte address the STA308A again responds with an
acknowledgement.
Byte write
In the byte write mode the master sends one data byte, this is acknowledged by the Omega
DDX core. The master then terminates the transfer by generating a STOP condition.
Multi-byte write
The multi-byte write modes can start from any internal address. The master generating a
STOP condition terminates the transfer.
Figure 4.
Figure 5.
th
-bit time. The byte following the device identification byte is the internal space address.
MULTIBYTE
SEQUENTIAL
SEQUENTIAL
CURRENT
ADDRESS
ADDRESS
CURRENT
RANDOM
RANDOM
WRITE
WRITE
READ
READ
READ
READ
BYTE
START
START
START
START
Write mode sequence
Read mode sequence
START
START
DEV-ADDR
DEV-ADDR
DEV-ADDR
DEV-ADDR
DEV-ADDR
DEV-ADDR
RW=
HIGH
RW
RW
RW
ACK
ACK
ACK
ACK
RW
RW
SUB-ADDR
SUB-ADDR
DATA
DATA
ACK
ACK
NO ACK
ACK
ACK
ACK
SUB-ADDR
SUB-ADDR
START
START
STOP
DATA
DEV-ADDR
DEV-ADDR
ACK
ACK
RW
RW
ACK
ACK
ACK
DATA IN
DATA IN
DATA
DATA
DATA
ACK
ACK
NO ACK
NO ACK
ACK
STOP
STOP
STOP
DATA
ACK
DATA IN
DATA
ACK
NO ACK
STA308A
STOP
STOP

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