ADUC834 Analog Devices, ADUC834 Datasheet - Page 32

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ADUC834

Manufacturer Part Number
ADUC834
Description
Precision Analog Microcontroller: 1MIPS 8052 MCU + 62kB Flash + 16/24-Bit ADC + 12-Bit DAC
Manufacturer
Analog Devices
Datasheet

Specifications of ADUC834

Mcu Core
8052
Mcu Speed (mips)
1
Sram (bytes)
2304Bytes
Gpio Pins
34
Adc # Channels
4
Other
PWM

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ADuC834
Using the Flash/EE Data Memory
The 4 Kbytes of Flash/EE data memory is configured as 1024 pages,
each of 4 bytes. As with the other ADuC834 peripherals, the
interface to this memory space is via a group of registers mapped
in the SFR space. A group of four data registers (EDATA1–4)
is used to hold the 4 bytes of data at each page. The page is
addressed via the two registers EADRH and EADRL. Finally,
ECON is an 8-bit control register that may be written with one
of nine Flash/EE memory access commands to trigger various
read, write, erase, and verify functions.
A block diagram of the SFR interface to the Flash/EE data
memory array is shown in Figure 20.
ECON—Flash/EE Memory Control SFR
Programming of either the Flash/EE data memory or the Flash/EE
program memory is done through the Flash/EE Memory Control
SFR (ECON). This SFR allows the user to read, write, erase or
verify the 4 Kbytes of Flash/EE data memory or the 56 Kbytes
of Flash/EE program memory.
ECON Value
01H
READ
02H
WRITE
03H
04H
VERIFY
05H
ERASE PAGE
06H
ERASE ALL
81H
READBYTE
82H
WRITEBYTE
0FH
EXULOAD
F0H
ULOAD
Command Description
(Normal Mode) (Power-On Default)
Results in 4 bytes in the Flash/EE data memory,
addressed by the page address EADRH/L,
being read into EDATA 1 to 4.
Results in 4 bytes in EDATA1–4 being written to the
Flash/EE data memory, at the page address given by
EADRH. (0 ≤ EADRH < 0400H)
Note: The 4 bytes in the page being addressed must
be pre-erased.
Reserved Command
Verifies if the data in EDATA1–4 is contained in the
page address given by EADRH/L. A subsequent read
of the ECON SFR will result in a 0 being read if the
verification is valid, or a nonzero value being read to
indicate an invalid verification.
Results in the erase of the 4 bytes page of Flash/EE data
memory addressed by the page address EADRH/L
Results in the erase of entire 4 Kbytes of Flash/EE
data memory.
Results in the byte in the Flash/EE data memory,
addressed by the byte address EADRH/L, being read
into EDATA1. (0 ≤ EADRH/L ≤ 0FFFH).
Results in the byte in EDATA1 being written into
Flash/EE data memory, at the byte address EADRH/L. Flash/EE program memory at the byte address
Leaves the ECON instructions to operate on the
Flash/EE data memory.
Enters ULOAD mode, directing subsequent ECON
instructions to operate on the Flash/EE program memory. program memory.
Table XIV.
ECON—Flash/EE Memory
–32–
Figure 20. Flash/EE Data Memory Control and Configuration
ARE GIVEN IN
ADDRESSES
BRACKETS
to the 256 bytes of Flash/EE program memory at the page
to verify the WRITE in software.
Results in the erase of the entire 56 Kbytes of ULOAD
instructions to operate on the Flash/EE data memory
Leaves the ECON Instructions to operate on the Flash/EE
Command Description
(ULOAD Mode)
Not Implemented. Use the MOVC instruction.
Results in bytes 0–255 of internal XRAM being written
address given by EADRH/L (0 ≤ EADRH/L < E0H)
Note: The 256 bytes in the page being addressed must
be pre-erased.
Reserved Command
Not Implemented. Use the MOVC and MOVX instructions
Results in the 64-bytes page of Flash/EE program memory,
addressed by the byte address EADRH/L being erased.
EADRL can equal any of 64 locations within the page. A new
page starts whenever EADRL is equal to 00H, 40H, 80H, or C0H
Flash/EE program memory
Not Implemented. Use the MOVC command.
Results in the byte in EDATA1 being written into
EADRH/L (0 ≤ EADRH/L ≤ DFFFH)
Enters normal mode directing subsequent ECON
BYTE
3FEH
3FFH
03H
02H
01H
00H
Commands
(0FFCH)
BYTE 1
(0FF8H)
(000CH)
(0008H)
(0004H)
(0000H)
BYTE 1
BYTE 1
BYTE 1
BYTE 1
BYTE 1
(0FFDH)
(0FF9H)
(000DH)
(0009H)
(0005H)
(0001H)
BYTE 2
BYTE 2
BYTE 2
BYTE 2
BYTE 2
BYTE 2
(0FFEH)
(0FFAH)
(000EH)
(000AH)
BYTE 3
BYTE 3
BYTE 3
(0006H)
(0002H)
BYTE 3
BYTE 3
BYTE 3
(0FFFH)
(0FFBH)
(000FH)
(000BH)
(0007H)
(0003H)
BYTE 4
BYTE 4
BYTE 4
BYTE 4
BYTE 4
BYTE 4
REV. A

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