AD5383 Analog Devices, AD5383 Datasheet - Page 34

• Manufacturer Part Number: AD5383
• Description: 32-Channel 12-Bit 3 V/5 V Single-Supply Voltage-Output DAC
• Manufacturer: Analog Devices

Specifications of AD5383

• Resolution (bits): 12bit
• Dac Update Rate: 167kSPS
• Dac Settling Time: 6µs
• Max Pos Supply (v): +5.5V
• Single-supply: No
• Dac Type: Voltage Out
• Dac Input Format: Par,Ser,SPI

AD5383
CHANNEL MONITOR FUNCTION
The AD5383 contains a channel monitor function that consists
of a multiplexer addressed via the interface, allowing any chan-
nel output to be routed to this pin for monitoring using an
external ADC. The channel monitor function must be enabled
in the control register before any channels are routed to
MON_OUT. Table 18 contains the decoding information
needed to route any channel to MON_OUT. To three-state
MON_OUT, select Channel Address 63. Figure 41 shows a
typical monitoring circuit using a 12-bit SAR ADC in a 6-lead
SOT-23 package. The controller output port selects the channel
to be monitored, and the input port reads the converted data
from the ADC.
TOGGLE MODE FUNCTION
The toggle mode function allows an output signal to be generated
using the LDAC control signal that switches between two DAC
data registers. This function is configured using the SFR control
register as follows. A write with REG1 = REG0 = 0 and A4 to
A0 = 01100 specifies a control register write. The toggle mode
function is enabled in groups of eight channels using Bit CR3 to
Bit CR0 in the control register. See the AD5383
Register Write/Read
of toggle mode implementation. Each of the 32 DAC channels
on the AD5383 contain an A and B data register. Note that the
B registers can only be loaded when toggle mode is enabled.
The sequence of events when configuring the AD5383 for
toggle mode is:
1.
2.
3.
4.
Enable toggle mode for the required channels via the
control register.
Load data to A registers.
Load data to B registers.
Apply LDAC .
section.
Figure 42
shows a block diagram
V
V
OUT
OUT
31
0
Control
DAC_GND SIGNAL_GND
REFOUT/REFIN
MON_IN1
MON_IN2
Figure 41. Typical Channel Monitoring Circuit
AD5383
AVCC
AVCC
MON_OUT
Rev. B | Page 34 of 40
AGND
SYNC
SCLK
DIN
V
The LDAC is used to switch between the A and B registers in
determining the analog output. The first LDAC configures the
output to reflect data in the A registers. This mode offers signi-
ficant advantages if the user wants to generate a square wave at
the output of all 32 channels, as might be required to drive a
liquid crystal-based variable optical attenuator. In this case, the
user writes to the control register and enables the toggle func-
tion by setting CR3 to CR2 = 1, thus enabling the four groups of
eight for toggle mode operation. The user must then load data
to all 32 A and B registers. Toggling LDAC sets the output
values to reflect the data in the A and B registers. The frequency
of the LDAC determines the frequency of the square wave
output.
Toggle mode is disabled via the control register. The first LDAC
following the disabling of the toggle mode updates the outputs
with the data contained in the A registers.
THERMAL MONITOR FUNCTION
The AD5383 contains a temperature shutdown function to
protect the chip in case multiple outputs are shorted. The short
circuit current of each output amplifier is typically 40 mA.
Operating the AD5383 at 5 V results in power dissipation of
200 mW per shorted amplifier. With five channels shorted, this
amounts to an extra watt of power dissipation. For the 100-lead
LQFP, the θ
The thermal monitor is enabled by the user via CR6 in the
control register. The output amplifiers on the AD5383 are
automatically powered down if the die temperature exceeds
approximately 130°C. After a thermal shutdown has occurred,
the user can re-enable the part by executing a soft power-up if
the temperature has dropped below 130°C or by turning off the
thermal monitor function via the control register.
IN
AD7476
AVCC
GND
SDATA
SCLK
CS
JA
is typically 44°C/W.
CONTROLLER
OUTPUT PORT
INPUT PORT