AD5383 Analog Devices, AD5383 Datasheet - Page 26

no-image

AD5383

Manufacturer Part Number
AD5383
Description
32-Channel 12-Bit 3 V/5 V Single-Supply Voltage-Output DAC
Manufacturer
Analog Devices
Datasheet

Specifications of AD5383

Resolution (bits)
12bit
Dac Update Rate
167kSPS
Dac Settling Time
6µs
Max Pos Supply (v)
+5.5V
Single-supply
No
Dac Type
Voltage Out
Dac Input Format
Par,Ser,SPI

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD5383BSTZ-3
Manufacturer:
Analog Devices Inc
Quantity:
10 000
Part Number:
AD5383BSTZ-3
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Part Number:
AD5383BSTZ-5
Manufacturer:
Analog Devices Inc
Quantity:
10 000
AD5383
INTERFACES
The AD5383 contains both parallel and serial interfaces.
Furthermore, the serial interface can be programmed to be
SPI-, DSP-, MICROWIRE-, or I
pin selects parallel and serial interface modes. In serial mode,
the SPI /I
interface mode.
The devices use an internal FIFO memory to allow high speed
successive writes in parallel interface mode. The user can con-
tinue writing new data to the device while write instructions are
being executed. The BUSY signal indicates the current status of
the device, going low while instructions in the FIFO are being
executed. In parallel mode, up to 128 successive instructions
can be written to the FIFO at maximum speed. When the FIFO
is full, any further writes to the device are ignored.
To minimize both the power consumption of the device and the
on-chip digital noise, the active interface only powers up fully
when the device is being written to, that is, on the falling edge
of WR or the falling edge of SYNC .
DSP-, SPI-, MICROWIRE-COMPATIBLE SERIAL
INTERFACES
The serial interface can be operated with a minimum of three
wires in standalone mode or four wires in daisy-chain mode.
Daisy-chaining allows many devices to be cascaded together to
increase system channel count. The SER/ PAR pin must be tied
high and the SPI /I
the DSP-/SPI-/MICROWIRE-compatible serial interface. In
serial interface mode, the user does not need to drive the
parallel input data pins. The serial interface’s control pins are:
Table 19. 40-Channel, 12-Bit DAC Serial Input Register Configuration
MSB
A /B
SYNC , DIN, SCLK—Standard 3-wire interface pins.
DCEN—Selects standalone mode or daisy-chain mode.
SDO—Data out pin for daisy-chain mode.
R/ W
2
C pin is used to select DSP, SPI, MICROWIRE, or I
0
A4
2
C pin (Pin 97) should be tied low to enable
A3
A2
2
C-compatible. The SER/ PAR
A1
A0
REG1
REG0
DB11
Rev. B | Page 26 of 40
2
C
DB10
Figure 3 and Figure 5 show timing diagrams for a serial write to
the AD5383 in standalone and daisy-chain modes. The 24-bit
data-word format for the serial interface is shown in Table 19.
A /B. When toggle mode is enabled, this pin selects whether the
data write is to the A or B register. With toggle disabled, this bit
should be set to zero to select the A data register.
R/ W is the read or write control bit.
A4 to A0 address the input channels.
REG1 and REG0 select the register to which data is written, as
shown in Table 11.
DB11 to DB0 contain the input data-word.
X is a don’t care condition.
Standalone Mode
By connecting the DCEN (daisy-chain enable) pin low, stand-
alone mode is enabled. The serial interface works with both a
continuous and a noncontinuous serial clock. The first falling
edge of SYNC starts the write cycle and resets a counter that
counts the number of serial clocks to ensure that the correct
number of bits are shifted into the serial shift register. Any
further edges on SYNC , except for a falling edge, are ignored
until 24 bits are clocked in. Once 24 bits have been shifted in,
the SCLK is ignored. In order for another serial transfer to take
place, the counter must be reset by the falling edge of SYNC .
DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
X
LSB
X

Related parts for AD5383