AD5737 Analog Devices, AD5737 Datasheet - Page 24

• Manufacturer Part Number: AD5737
• Description: Quad Channel, 12-Bit, Serial Input, 4-20mA Output DAC with Dynamic Power Control and HART Connectivity
• Manufacturer: Analog Devices

Specifications of AD5737

• Resolution (bits): 12bit
• Dac Settling Time: 15µs
• Max Pos Supply (v): +33V
• Single-supply: No
• Dac Type: Current Out
• Dac Input Format: Ser,SPI

AD5737
ENABLING THE OUTPUT
To correctly write to and set up the part from a power-on
condition, use the following sequence:
1.
2.
3.
4.
5.
Figure 50 provides a flowchart of this sequence.
Figure 50. Programming Sequence to Correctly Enable the Output
Perform a hardware or software reset after initial power-on.
Configure the dc-to-dc converter supply block. Set the
dc-to-dc switching frequency, the maximum output voltage
allowed, and the dc-to-dc converter phase between channels.
Configure the DAC control register on a per-channel basis.
Select the output range, and enable the dc-to-dc converter
block (DC_DC bit). Other control bits can also be config-
ured. Set the INT_ENABLE bit, but do not set the OUTEN
(output enable) bit.
Write the required code to the DAC data register. This step
implements a full internal DAC calibration. For reduced
output glitch, allow at least 200 μs before performing Step 5.
Write to the DAC control register again to enable the
output (set the OUTEN bit).
STEP 1: PERFORM A SOFTWARE/HARDWARE RESET.
STEP 2: WRITE TO DC-TO-DC CONTROL REGISTER TO
STEP 3: WRITE TO DAC CONTROL REGISTER. SELECT
STEP 4: WRITE TO ONE OR MORE DAC DATA REGISTERS.
STEP 5: WRITE TO DAC CONTROL REGISTER. RELOAD
SET DC-TO-DC CLOCK FREQUENCY, PHASE,
AND MAXIMUM VOLTAGE.
THE DAC CHANNEL AND OUTPUT RANGE.
SET THE DC_DC BIT AND OTHER CONTROL
BITS AS REQUIRED. SET THE INT_ENABLE BIT
BUT DO NOT SET THE OUTEN BIT.
SEQUENCE AS IN STEP 3. SET THE OUTEN
BIT TO ENABLE THE OUTPUT.
ALLOW AT LEAST 200µs BETWEEN STEP 3
AND STEP 5 FOR REDUCED OUTPUT GLITCH.
POWER ON.
Rev. A | Page 24 of 44
REPROGRAMMING THE OUTPUT RANGE
When changing the range of an output, the same sequence
described in the Enabling the Output section should be used.
It is recommended that the range be set to 0 V (zero scale or
midscale) before the output is disabled. Because the dc-to-dc
switching frequency, maximum output voltage, and phase have
already been selected, there is no need to reprogram these values.
Figure 51 provides a flowchart of this sequence.
Figure 51. Programming Sequence to Change the Output Range
STEP 1: WRITE TO CHANNEL’S DAC DATA
STEP 2: WRITE TO DAC CONTROL REGISTER.
STEP 3: WRITE VALUE TO THE DAC DATA REGISTER.
STEP 4: WRITE TO DAC CONTROL REGISTER.
REGISTER. SET THE OUTPUT
TO 0V (ZERO OR MIDSCALE).
DISABLE THE OUTPUT (OUTEN = 0) AND
SET THE NEW OUTPUT RANGE. KEEP THE
DC_DC BIT AND THE INT_ENABLE BIT SET.
RELOAD SEQUENCE AS IN STEP 2.
SET THE OUTEN BIT TO ENABLE THE
OUTPUT.
CHANNEL OUTPUT IS ENABLED.
Data Sheet