AD5737 Analog Devices, AD5737 Datasheet - Page 23

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AD5737

Manufacturer Part Number
AD5737
Description
Quad Channel, 12-Bit, Serial Input, 4-20mA Output DAC with Dynamic Power Control and HART Connectivity
Manufacturer
Analog Devices
Datasheet

Specifications of AD5737

Resolution (bits)
12bit
Dac Settling Time
15µs
Max Pos Supply (v)
+33V
Single-supply
No
Dac Type
Current Out
Dac Input Format
Ser,SPI

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Data Sheet
REGISTERS
Table 7, Table 8, and Table 9 provide an overview of the registers for the AD5737.
Table 7. Data Registers for the
Register
DAC Data Registers
Gain Registers
Offset Registers
Clear Code Registers
Table 8. Control Registers for the
Register
Main Control Register
DAC Control Registers
Software Register
DC-to-DC Control Register
Slew Rate Control Registers
Table 9. Readback Register for the
Register
Status Register
AD5737
Description
The four DAC data registers (one register per DAC channel) are used to write a DAC code to each DAC
channel. The DAC data bits are D15 to D4.
The four gain registers (one register per DAC channel) are used to program the gain trim on a per-channel
basis. The gain data bits are D15 to D4.
The four offset registers (one register per DAC channel) are used to program the offset trim on a per-channel
basis. The offset data bits are D15 to D4.
The four clear code registers (one register per DAC channel) are used to program the clear code on a per-
channel basis. The clear code data bits are D15 to D4.
Description
The main control register is used to configure functions for the entire part. These functions include the
following: enabling status readback during a write; enabling the output on all four DAC channels simulta-
neously; power-on of the dc-to-dc converter on all four DAC channels simultaneously; and enabling and
configuring the watchdog timer. For more information, see the Main Control Register section.
The four DAC control registers (one register per DAC channel) are used to configure the following functions
on a per-channel basis: output range (for example, 4 mA to 20 mA); selection of the internal current sense
resistor or an external current sense resistor; enabling/disabling the use of a clear code; enabling/disabling
the internal circuitry (dc-to-dc converter, DAC, and internal amplifiers); power-on/power-off of the dc-to-dc
converter; and enabling/disabling the output channel.
The software register is used to perform a reset, to toggle the user bit in the status register, and, as part of
the watchdog timer feature, to verify correct data communication operation.
The dc-to-dc control register is used to set the control parameters for the dc-to-dc converter: maximum
output voltage, phase, and switching frequency. This register is also used to select the internal compensa-
tion resistor or an external compensation resistor for the dc-to-dc converter.
The four slew rate control registers (one register per DAC channel) are used to program the slew rate of
the DAC output.
Description
The status register contains any fault information, as well as a user toggle bit.
AD5737
AD5737
Rev. A | Page 23 of 44
AD5737

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