AD7760 Analog Devices, AD7760 Datasheet - Page 9

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AD7760

Manufacturer Part Number
AD7760
Description
2.5 MSPS, 24-Bit, 100 dB Sigma-Delta ADC with On-Chip Buffer
Manufacturer
Analog Devices
Datasheet

Specifications of AD7760

Resolution (bits)
24bit
# Chan
1
Sample Rate
40MSPS
Interface
Par
Analog Input Type
Diff-Uni
Ain Range
4 V p-p,6.5 V p-p
Adc Architecture
Sigma-Delta
Pkg Type
QFP

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PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Table 5. Pin Function Descriptions
Pin No.
6, 33
4, 14, 15, 27
24
12
7, 34
5, 13, 16, 18, 28
23, 29, 31, 32
11
9
41
44, 63
1, 35, 42, 43,
53, 62, 64
19
20
21
22
25
26
10
8
Mnemonic
AV
AV
AV
AV
AGND1
AGND2
AGND3
AGND4
REFGND
DV
V
DGND
V
V
V
V
V
V
V
DECAPA
DRIVE
IN
IN
OUT
OUT
IN
IN
REF+
DD
DD
DD
DD
A+
A−
+
DD
A−
A+
1
2
3
4
Description
2.5 V Power Supply for Modulator. These pins should be decoupled to AGND1 (Pin 7 and Pin 34, respectively)
with 100 nF and 10 μF capacitors on each pin. See the Decoupling and Layout Recommendations section
for details.
5 V Power Supply. These pins should be decoupled to AGND2 (Pin 5 and Pin 13, with 100 nF capacitors
on each of Pin 4, Pin 14, and Pin 15). Pin 27 should be connected to Pin 14 via a 15 nH inductor. See the
Decoupling and Layout Recommendations section for details.
3.3 V to 5 V Power Supply for Differential Amplifier. This pin should be decoupled to AGND3 (Pin 23) with a
100 nF capacitor. See the Decoupling and Layout Recommendations section for details.
3.3 V to 5 V Power Supply for Reference Buffer. This pin should be decoupled to Pin 9 with a 10 nF capacitor
in series with a 10 Ω resistor.
Power Supply Ground for Analog Circuitry Powered by AV
Power Supply Ground for Analog Circuitry Powered by AV
Power Supply Ground for Analog Circuitry Powered by AV
Power Supply Ground for Analog Circuitry Powered by AV
Reference Ground. Ground connection for the reference voltage.
2.5 V Power Supply for Digital Circuitry and FIR Filter. This pin should be decoupled to DGND with a 100 nF
capacitor.
Logic Power Supply Input, 1.8 V to 2.5 V. The voltage supplied at these pins determines the operating
voltage of the logic interface. Both of these pins must be connected together and tied to the same supply.
Each pin should also be decoupled to DGND with a 100 nF capacitor.
Ground Reference for Digital Circuitry.
Positive Input to Differential Amplifier.
Negative Input to Differential Amplifier.
Negative Output from Differential Amplifier.
Positive Output from Differential Amplifier.
Positive Input to the Modulator.
Negative Input to the Modulator.
Reference Input. The input range of this pin is determined by the reference buffer supply voltage (AV
See the Reference Voltage Filtering section for more details.
Decoupling Pin. A 100 nF capacitor must be inserted between this pin and AGND.
MCLKGND
DECAPA
REFGND
AGND2
AGND1
AGND4
AGND2
AGND2
AV
AV
AV
AV
AV
DGND
MCLK
V
REF+
DD
DD
DD
DD
DD
2
1
4
2
2
10
11
12
13
14
15
16
1
3
9
2
4
5
6
7
8
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
PIN 1
Figure 4. 64-Lead TQFP Pin Configuration
Rev. A | Page 9 of 36
(Not to Scale)
AD7760
TOP VIEW
DD
DD
DD
DD
1.
2.
3.
4.
48
46
40
47
45
44
43
42
41
39
38
37
36
35
34
33
DB12
DB13
DB14
DB15
V
DGND
DGND
DV
CS
RD/WR
DRDY
RESET
SYNC
DGND
AGND1
AV
DRIVE
DD
DD
1
AD7760
DD
4).

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