AD6659 Analog Devices, AD6659 Datasheet - Page 25

• Manufacturer Part Number: AD6659
• Description: Dual IF Receiver
• Manufacturer: Analog Devices

Specifications of AD6659

• Resolution (bits): 12bit
• # Chan: 2
• Sample Rate: 80MSPS
• Interface: Par
• Analog Input Type: Diff-Bip
• Ain Range: 2 V p-p
• Adc Architecture: Pipelined
• Pkg Type: CSP

CHANNEL/CHIP SYNCHRONIZATION
The AD6659 has a SYNC input that offers the user flexible
synchronization options for synchronizing sample clocks
across multiple ADCs. The input clock divider can be enabled to
synchronize on a single occurrence of the SYNC signal or on every
occurrence. The SYNC input is internally synchronized to the
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sample clock; however, to ensure that there is no timing
uncertainty exists between multiple parts, the SYNC input
signal should be externally synchronized to the input clock
signal, meeting the setup and hold times shown in Table 5.
Drive the SYNC input using a single-ended CMOS-type signal.
AD6659