AD6659 Analog Devices, AD6659 Datasheet - Page 19

• Manufacturer Part Number: AD6659
• Description: Dual IF Receiver
• Manufacturer: Analog Devices

Specifications of AD6659

• Resolution (bits): 12bit
• # Chan: 2
• Sample Rate: 80MSPS
• Interface: Par
• Analog Input Type: Diff-Bip
• Ain Range: 2 V p-p
• Adc Architecture: Pipelined
• Pkg Type: CSP

VOLTAGE REFERENCE
A stable and accurate 1.0 V voltage reference is built into the
AD6659. The VREF can be configured using either the internal
1.0 V reference or an externally applied 1.0 V reference voltage.
The various reference modes are summarized in the sections
that follow. The Reference Decoupling section describes best
practices for PCB layout of the reference.
Internal Reference Connection
A comparator within the AD6659 detects the potential at the
SENSE pin and configures the reference in one of two possible
modes, which are summarized in Table 10. If SENSE is grounded,
the reference amplifier switch is connected to the internal resistor
divider (see Figure 33), setting V
If the internal reference of the AD6659 is used to drive multiple
converters to improve gain matching, the loading of the reference
by the other converters must be considered. Figure 34 shows
how the internal reference voltage is affected by loading.
Table 10. Reference Configuration Summary
Selected Mode
Fixed Internal Reference
Fixed External Reference
1.0µF
Figure 33. Internal Reference Configuration
VIN+A/VIN+B
VIN–A/VIN–B
0.1µF
SENSE
VREF
SENSE Voltage (V)
AGND to 0.2
AVDD
REF
SELECT
LOGIC
to 1.0 V.
ADC
0.5V
CORE
ADC
Resulting V
1.0 internal
1.0 applied to external VREF pin
Rev. | Page 19 of 40
REF
(V)
External Reference Operation
The use of an external reference may be necessary to enhance
the gain accuracy of the ADC or improve thermal drift charac-
teristics. Figure 35 shows the typical drift characteristics of the
internal reference in 1.0 V mode.
When the SENSE pin is tied to AVDD, the internal reference is
disabled, allowing the use of an external reference. An internal
reference buffer loads the external reference with an equivalent
7.5 kΩ load (see Figure 25). The internal buffer generates the
positive and negative full-scale references for the ADC core.
Therefore, the external reference must be limited to a maximum
of 1.0 V.
–0.5
–1.0
–1.5
–2.0
–2.5
–3.0
–1
–2
–3
–4
–5
–6
0
4
3
2
1
0
–40
0
0.2
Figure 34. V
–20
0.4
Figure 35. Typical V
Resulting Differential Span (V p-p)
2.0
2.0
0.6
V
0
REF
LOAD CURRENT (mA)
REF
TEMPERATURE (°C)
INTERNAL V
Accuracy vs. Load Current
0.8
ERROR (mV)
20
1.0
REF
REF
1.2
= 0.993V
Drift
40
1.4
1.6
60
1.8
AD6659
80
2
.0