SAM3N0A Atmel Corporation, SAM3N0A Datasheet - Page 661

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SAM3N0A

Manufacturer Part Number
SAM3N0A
Description
Manufacturer
Atmel Corporation
Datasheets
33.7.2
Name:
Address:
Access:
This register can only be written if the WPEN bit is cleared in
• TRGEN: Trigger Enable
• TRGSEL: Trigger Selection
• LOWRES: Resolution
• SLEEP: Sleep Mode
11011A–ATARM–04-Oct-10
11011A–ATARM–04-Oct-10
FREERUN
Value
Value
USEQ
Value
Value
31
23
15
0
1
0
1
0
1
2
3
4
5
6
7
0
1
7
ADC Mode Register
NORMAL
SLEEP
Name
FWUP
ADC_TRIG0
ADC_TRIG1
ADC_TRIG2
ADC_TRIG3
ADC_TRIG4
ADC_TRIG5
ADC_TRIG6
30
22
14
ADC_MR
0x40038004
Read-write
6
BITS_10
BITS_8
Name
Name
Name
DIS
EN
Description
Normal Mode: The ADC Core and reference voltage circuitry are kept ON between conversions
Sleep Mode: The ADC Core and reference voltage circuitry are OFF between conversions
SLEEP
29
21
13
5
Hardware triggers are disabled. Starting a conversion is only possible by software.
Description
Hardware trigger selected by TRGSEL field is enabled.
Description
10-bit resolution
8-bit resolution
Description
External trigger
TIO Output of the Timer Counter Channel 0
TIO Output of the Timer Counter Channel 1
TIO Output of the Timer Counter Channel 2
Reserved
Reserved
Reserved
Reserved
LOWRES
28
20
12
4
PRESCAL
“ADC Write Protect Mode Register” on page
27
19
11
3
TRGSEL
26
18
10
2
TRACKTIM
STARTUP
25
17
9
1
677.
SAM3N
SAM3N
TRGEN
24
16
8
0
661
661

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