SAM9X25 Atmel Corporation, SAM9X25 Datasheet - Page 80

• Manufacturer Part Number: SAM9X25
• Manufacturer: Atmel Corporation

Specifications of SAM9X25

• Flash (kbytes): 0 Kbytes
• Pin Count: 217
• Max. Operating Frequency: 400 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 105
• Ext Interrupts: 105
• Usb Transceiver: 3
• Usb Speed: Hi-Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 3
• Uart: 7
• Can: 2
• Lin: 4
• Ssc: 1
• Ethernet: 2
• Sd / Emmc: 2
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 12
• Adc Resolution (bits): 10
• Adc Speed (ksps): 440
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 32
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: DDR/LPDDR, SDRAM/LPSDR
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 0.9 to 1.1
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

Memory Management Unit
3.2.9
3-16
Translating large page references
The two least significant bits of the second-level descriptor indicate the descriptor type
as shown in Table 3-8.
Tiny pages do not support subpage permissions and therefore only have one set of
access permission bits.
Figure 3-10 on page 3-17 shows the complete translation sequence for a 64KB large
page.
Bits
Large
[11:4]
[3:2]
[1:0]
Value
0 0
0 1
1 0
1 1
Copyright © 2001-2003 ARM Limited. All rights reserved.
Note
Small
[11:4]
[3:2]
[1:0]
Meaning
Invalid
Large page
Small page
Tiny page
Tiny
[5:4]
[3:2]
[1:0]
Access permission bits. Domain access control on page 3-24
These bits indicate the page size and validity and are
Description
and Fault checking sequence on page 3-26 show how to
interpret the access permission bits.
These bits, C and B, indicate whether the area of memory
mapped by this page is treated as write-back cachable,
write-through cachable, noncached buffered, or noncached
nonbuffered.
interpreted as shown in Table 3-8.
Table 3-7 Second-level descriptor bits (continued)
Table 3-8 Interpreting page table entry bits [1:0]
Description
Generates a page translation fault
Indicates that this is a 64KB page
Indicates that this is a 4KB page
Indicates that this is a 1KB page
ARM DDI0198D