SAM9X25 Atmel Corporation, SAM9X25 Datasheet - Page 178
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SAM9X25
Manufacturer Part Number
SAM9X25
Description
Manufacturer
Atmel Corporation
Datasheets
1.SAM9261.pdf
(248 pages)
2.SAM9X25.pdf
(45 pages)
3.SAM9X25.pdf
(1145 pages)
4.SAM9X25.pdf
(45 pages)
5.SAM9X25.pdf
(1325 pages)
Specifications of SAM9X25
Flash (kbytes)
0 Kbytes
Pin Count
217
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
105
Ext Interrupts
105
Usb Transceiver
3
Usb Speed
Hi-Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
3
Uart
7
Can
2
Lin
4
Ssc
1
Ethernet
2
Sd / Emmc
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
12
Adc Resolution (bits)
10
Adc Speed (ksps)
440
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
32
Self Program Memory
NO
External Bus Interface
1
Dram Memory
DDR/LPDDR, SDRAM/LPSDR
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No/Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
- SAM9261 PDF datasheet
- SAM9X25 PDF datasheet #2
- SAM9X25 PDF datasheet #3
- SAM9X25 PDF datasheet #4
- SAM9X25 PDF datasheet #5
- Current page: 178 of 248
- Download datasheet (2Mb)
Embedded Trace Macrocell Support
10.1
10.1.1
10-2
About Embedded Trace Macrocell support
FIFOFULL
To support real-time trace, the ARM926EJ-S processor provides an interface to enable
connection of an Embedded Trace Macrocell (ETM). For more information on the
ETM, see the ETM9 Technical Reference Manual.
The ETM consists of two parts:
Trace port
Triggering facilities
The ETM is used to compress the trace information and export it through a narrow trace
port. An external Trace Port Analyzer (TPA) is used to capture the trace information.
The ARM926EJ-S ETM interface exports the required signals for the ETM to perform
trace. The interface is enabled and disabled by the ETMEN input signal. Where an
ETM module is not required, the ETMEN input can be tied LOW to disable the trace
outputs and save power.
Whenever the ETM FIFO fills up, the ETM asserts its FIFOFULL signal. To prevent
loss in trace coverage, the ARM926EJ-S processor stalls until FIFOFULL is
deasserted.
The ARM926EJ-S processor only stalls on instruction boundaries, to allow any AHB
transfers to complete. Programming of the ETM FIFO watermark must take this into
consideration. If the current instruction is either an
have to accept up to 16 words after FIFOFULL has been asserted.
Interrupts (FIQ or IRQ) prevent the ARM926EJ-S processor from stalling when
FIFOFULL is asserted, unless they are masked. See Test and Debug Register c15 on
page 2-36 for details of how interrupts can be masked during trace.
Copyright © 2001-2003 ARM Limited. All rights reserved.
A trace protocol has been developed to provide a real-time trace
capability for processor cores that are deeply embedded in larger ASIC
designs. Because the ASIC normally includes significant amounts of
on-chip memory, it is not possible to determine how the processor core is
operating by only observing the pins of the ASIC. A trace port is required
to understand the operation of the processor.
An extensible specification exists, enabling you to specify the exact set
of trigger resources required for a particular application. Resources
include address and data comparators, counter, and sequencers.
or an
, then the FIFO might
ARM DDI0198D
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